91b682c33c
While at it, replace LibAmdMemFill() with memset(). Change-Id: I770cab446add8f305f02e365e7c9763df88cd958 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21192 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
81 lines
2.4 KiB
C
81 lines
2.4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define __SIMPLE_DEVICE__
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#include <soc/imc.h>
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#include <arch/io.h>
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#include <device/device.h>
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#include <delay.h>
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#include <Porting.h>
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#include <AGESA.h>
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#include <Lib/amdlib.h>
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#include <Proc/Fch/Common/FchCommonCfg.h>
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#include <Proc/Fch/Fch.h>
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#include <Proc/Fch/FchPlatform.h>
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#define VACPI_MMIO_VBASE ((u8 *)ACPI_MMIO_BASE)
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void imc_reg_init(void)
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{
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u8 reg8;
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/* Init Power Management Block 2 (PM2) Registers.
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* Check BKDG for AMD Family 16h for details. */
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write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x00), 0x06);
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write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x01), 0x06);
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write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x02), 0xf7);
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write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x03), 0xff);
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write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x04), 0xff);
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write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x10), 0x06);
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write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x11), 0x06);
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write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x12), 0xf7);
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write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x13), 0xff);
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write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x14), 0xff);
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reg8 = pci_read_config8(PCI_DEV(0, 0x18, 0x3), 0x1e4);
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reg8 &= 0x8f;
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reg8 |= 0x10;
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pci_write_config8(PCI_DEV(0, 0x18, 0x3), 0x1e4, reg8);
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}
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void enable_imc_thermal_zone(void)
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{
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AMD_CONFIG_PARAMS StdHeader;
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UINT8 FunNum;
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UINT8 regs[9];
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int i;
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regs[0] = 0;
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regs[1] = 0;
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FunNum = Fun_80;
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for (i = 0 ; i <= 1 ; i++)
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WriteECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader);
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WriteECmsg(MSG_SYS_TO_IMC, AccessWidth8, &FunNum, &StdHeader);
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WaitForEcLDN9MailboxCmdAck(&StdHeader);
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for (i = 2 ; i <= 9 ; i++)
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ReadECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader);
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/* enable thermal zone 0 */
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regs[2] |= 1;
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regs[0] = 0;
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regs[1] = 0;
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FunNum = Fun_81;
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for (i = 0 ; i <= 9 ; i++)
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WriteECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader);
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WriteECmsg(MSG_SYS_TO_IMC, AccessWidth8, &FunNum, &StdHeader);
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WaitForEcLDN9MailboxCmdAck(&StdHeader);
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}
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