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coreboot-kgpe-d16/src/soc/intel/baytrail
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Aaron Durbin 003931975f baytrail: align with intel recommendations 
The BISOC.EXIT_SELF_REFRESH_LATENCY field should
not be updated from the default.

BUG=chrome-os-partner:24345
BRANCH=None
TEST=Built and booted. S3 resumed.

Change-Id: I6e701a520513372318258648e998dd8c7ab29ea4
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180730
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/5025
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
2014-05-12 22:11:10 +02:00
..
acpi baytrail: Expose IOSF as ACPI object 2014-05-12 22:10:18 +02:00
baytrail baytrail: Add header include wrapper and offset define 2014-05-12 22:08:15 +02:00
bootblock baytrail: load microcode in bootblock 2014-02-05 05:24:13 +01:00
microcode baytrail: Update to microcode 31E and fix C-state table 2014-05-08 07:05:29 +02:00
romstage baytrail: allow ramstage_cache_location() usage in ramstage 2014-05-10 06:31:52 +02:00
acpi.c baytrail: Basic DPTF framework 2014-05-09 05:42:52 +02:00
chip.c baytrail: add support for disabling south cluster pci devices 2014-02-27 06:12:43 +01:00
chip.h baytrail: Add support for LPSS and SCC devices in ACPI mode 2014-05-10 06:30:36 +02:00
cpu.c baytrail: Enable Turbo/Burst and set some magic MSRs 2014-05-06 17:20:07 +02:00
ehci.c baytrail: utilize reg_script_run_on_dev() 2014-05-10 06:31:29 +02:00
emmc.c baytrail: Put devices in ACPI mode after setup 2014-05-12 22:08:22 +02:00
gfx.c baytrail: utilize reg_script_run_on_dev() 2014-05-10 06:31:29 +02:00
gpio.c baytrail: gpio: Make GPIO inputs MMIO by default 2014-05-08 07:07:17 +02:00
iosf.c baytrail: add more iosf access functions 2014-05-10 06:31:00 +02:00
Kconfig baytrail: romstage: Add config option to enable RMT 2014-05-07 22:07:03 +02:00
lpe.c baytrail: lpe audio device needs memory for its firmware 2014-05-09 05:41:20 +02:00
lpss.c baytrail: Put devices in ACPI mode after setup 2014-05-12 22:08:22 +02:00
Makefile.inc baytrail: allow ramstage_cache_location() usage in ramstage 2014-05-10 06:31:52 +02:00
memmap.c baytrail: SMM support 2014-02-16 20:57:14 +01:00
mrc_cache.c baytrail: add initial support 2014-01-31 16:36:59 +01:00
northcluster.c baytrail: Add function to read top of low memory 2014-04-30 23:11:21 +02:00
nvm.c baytrail: add initial support 2014-01-31 16:36:59 +01:00
pcie.c baytrail: utilize reg_script_run_on_dev() 2014-05-10 06:31:29 +02:00
perf_power.c baytrail: align with intel recommendations 2014-05-12 22:11:10 +02:00
placeholders.c baytrail: Add ACPI CPU entries 2014-05-06 18:39:04 +02:00
pmutil.c baytrail: add GPIO SMI support 2014-05-06 18:39:29 +02:00
ramstage.c baytrail: note S3 resume status earlier 2014-05-10 06:31:37 +02:00
refcode.c baytrail: add way to load reference code from vboot area 2014-05-12 22:10:33 +02:00
reset.c baytrail: add reset support 2014-02-11 22:22:25 +01:00
sata.c baytrail: Add SATA driver 2014-02-27 06:13:30 +01:00
scc.c baytrail: utilize reg_script_run_on_dev() 2014-05-10 06:31:29 +02:00
sd.c baytrail: Add support for LPSS and SCC devices in ACPI mode 2014-05-10 06:30:36 +02:00
smihandler.c baytrail: add GPIO SMI support 2014-05-06 18:39:29 +02:00
smm.c baytrail: don't allow PCIE wake ups 2014-05-07 12:05:58 +02:00
southcluster.c baytrail: configure acpi SCI irq 2014-05-06 17:17:40 +02:00
spi.c baytrail: add initial support 2014-01-31 16:36:59 +01:00
stage_cache.c baytrail: allow ramstage_cache_location() usage in ramstage 2014-05-10 06:31:52 +02:00
tsc_freq.c baytrail: Add BCLK and IACORE to pattrs 2014-05-06 18:38:58 +02:00
xhci.c baytrail: utilize reg_script_run_on_dev() 2014-05-10 06:31:29 +02:00