9533d836d7
Change-Id: I4d8abe3841378e06515e1b3a8f22d78425d08449 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6109 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
129 lines
3.6 KiB
C
129 lines
3.6 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007 AMD
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* Written by Yinghai Lu <yinghailu@amd.com> for AMD.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* This file was generated by getpir.c, do not modify!
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* (but if you do, please run checkpir on it to verify)
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* Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
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* Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
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*/
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#include <console/console.h>
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#include <device/pci.h>
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#include <string.h>
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#include <stdint.h>
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#include <arch/pirq_routing.h>
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#include <cpu/amd/amdk8_sysconf.h>
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#include "mb_sysconf.h"
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static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
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uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
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uint8_t slot, uint8_t rfu)
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{
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pirq_info->bus = bus;
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pirq_info->devfn = devfn;
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pirq_info->irq[0].link = link0;
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pirq_info->irq[0].bitmap = bitmap0;
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pirq_info->irq[1].link = link1;
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pirq_info->irq[1].bitmap = bitmap1;
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pirq_info->irq[2].link = link2;
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pirq_info->irq[2].bitmap = bitmap2;
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pirq_info->irq[3].link = link3;
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pirq_info->irq[3].bitmap = bitmap3;
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pirq_info->slot = slot;
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pirq_info->rfu = rfu;
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}
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unsigned long write_pirq_routing_table(unsigned long addr)
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{
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struct irq_routing_table *pirq;
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struct irq_info *pirq_info;
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unsigned slot_num;
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uint8_t *v;
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struct mb_sysconf_t *m;
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unsigned sbdn;
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uint8_t sum=0;
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int i;
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get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
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sbdn = sysconf.sbdn;
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m = sysconf.mb;
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/* Align the table to be 16 byte aligned. */
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addr += 15;
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addr &= ~15;
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/* This table must be between 0xf0000 & 0x100000 */
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printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
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pirq = (void *)(addr);
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v = (uint8_t *)(addr);
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pirq->signature = PIRQ_SIGNATURE;
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pirq->version = PIRQ_VERSION;
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pirq->rtr_bus = m->bus_mcp55[0];
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pirq->rtr_devfn = ((sbdn+6)<<3)|0;
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pirq->exclusive_irqs = 0;
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pirq->rtr_vendor = 0x10de;
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pirq->rtr_device = 0x0370;
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pirq->miniport_data = 0;
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memset(pirq->rfu, 0, sizeof(pirq->rfu));
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pirq_info = (void *) ( &pirq->checksum + 1);
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slot_num = 0;
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//pci bridge
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write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
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pirq_info++; slot_num++;
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for(i=1; i< sysconf.hc_possible_num; i++) {
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if(!(sysconf.pci1234[i] & 0x1) ) continue;
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unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
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unsigned devn = sysconf.hcdn[i] & 0xff;
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write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
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pirq_info++; slot_num++;
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}
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pirq->size = 32 + 16 * slot_num;
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for (i = 0; i < pirq->size; i++)
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sum += v[i];
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sum = pirq->checksum - sum;
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if (sum != pirq->checksum) {
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pirq->checksum = sum;
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}
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printk(BIOS_INFO, "done.\n");
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return (unsigned long) pirq_info;
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}
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