208 lines
6.4 KiB
Plaintext
208 lines
6.4 KiB
Plaintext
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2007-2010 coresystems GmbH
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## (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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# TODO: Explain differences (if any) for onboard cards.
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config VGA_ROM_RUN
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bool "Run VGA Option ROMs"
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default y
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help
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Execute VGA Option ROMs in coreboot if found. This is required
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to enable PCI/AGP/PCI-E video cards when not using a SeaBIOS
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payload.
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When using a SeaBIOS payload it runs all option ROMs with much
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more complete BIOS interrupt services available than coreboot,
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which some option ROMs require in order to function correctly.
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If unsure, say N when using SeaBIOS as payload, Y otherwise.
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config S3_VGA_ROM_RUN
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bool "Re-run VGA Option ROMs on S3 resume"
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default y
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depends on VGA_ROM_RUN && HAVE_ACPI_RESUME
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help
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Execute VGA Option ROMs in coreboot when resuming from S3 suspend.
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When using a SeaBIOS payload it runs all option ROMs with much
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more complete BIOS interrupt services available than coreboot,
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which some option ROMs require in order to function correctly.
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If unsure, say N when using SeaBIOS as payload, Y otherwise.
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config PCI_ROM_RUN
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bool "Run non-VGA Option ROMs"
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default y
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help
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Execute non-VGA PCI Option ROMs in coreboot if found.
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Examples include IDE/SATA controller Option ROMs and Option ROMs
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for network cards (NICs).
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When using a SeaBIOS payload it runs all option ROMs with much
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more complete BIOS interrupt services available than coreboot,
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which some option ROMs require in order to function correctly.
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If unsure, say N when using SeaBIOS as payload, Y otherwise.
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config ON_DEVICE_ROM_RUN
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bool "Run Option ROMs on PCI devices"
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default y
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help
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Execute Option ROMs stored on PCI/PCIe/AGP devices in coreboot.
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If disabled, only Option ROMs stored in CBFS will be executed by
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coreboot. If you are concerned about security, you might want to
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disable this option, but it might leave your system in a state of
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degraded functionality.
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When using a SeaBIOS payload it runs all option ROMs with much
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more complete BIOS interrupt services available than coreboot,
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which some option ROMs require in order to function correctly.
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If unsure, say N when using SeaBIOS as payload, Y otherwise.
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choice
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prompt "Option ROM execution type"
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default PCI_OPTION_ROM_RUN_YABEL if !ARCH_X86
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default PCI_OPTION_ROM_RUN_REALMODE if ARCH_X86
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depends on PCI_ROM_RUN || VGA_ROM_RUN || GEODE_VSA
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config PCI_OPTION_ROM_RUN_REALMODE
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prompt "Native mode"
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bool
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depends on ARCH_X86
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help
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If you select this option, PCI Option ROMs will be executed
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natively on the CPU in real mode. No CPU emulation is involved,
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so this is the fastest, but also the least secure option.
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(only works on x86/x64 systems)
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config PCI_OPTION_ROM_RUN_YABEL
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prompt "Secure mode"
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bool
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depends on !GEODE_VSA
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help
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If you select this option, the x86emu CPU emulator will be used to
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execute PCI Option ROMs.
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This option prevents Option ROMs from doing dirty tricks with the
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system (such as installing SMM modules or hypervisors), but it is
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also significantly slower than the native Option ROM initialization
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method.
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This is the default choice for non-x86 systems.
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endchoice
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config YABEL_PCI_ACCESS_OTHER_DEVICES
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prompt "Allow Option ROMs to access other devices"
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bool
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depends on PCI_OPTION_ROM_RUN_YABEL
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help
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Per default, YABEL only allows Option ROMs to access the PCI device
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that they are associated with. However, this causes trouble for some
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onboard graphics chips whose Option ROM needs to reconfigure the
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north bridge.
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config YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG
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prompt "Fake success on writing other device's config space"
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bool
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depends on YABEL_PCI_ACCESS_OTHER_DEVICES
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help
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By default, YABEL aborts when the Option ROM tries to write to other
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devices' config spaces. With this option enabled, the write doesn't
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follow through, but the Option ROM is allowed to go on.
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This can create issues such as hanging Option ROMs (if it depends on
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that other register changing to the written value), so test for
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impact before using this option.
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config YABEL_VIRTMEM_LOCATION
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prompt "Location of YABEL's virtual memory"
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hex
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depends on PCI_OPTION_ROM_RUN_YABEL && EXPERT
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default 0x1000000
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help
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YABEL requires 1MB memory for its CPU emulation. This memory is
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normally located at 16MB.
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config YABEL_VIRTMEM_LOCATION
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hex
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depends on PCI_OPTION_ROM_RUN_YABEL && !EXPERT
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default 0x1000000
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config YABEL_DIRECTHW
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prompt "Direct hardware access"
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bool
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depends on PCI_OPTION_ROM_RUN_YABEL
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help
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YABEL consists of two parts: It uses x86emu for the CPU emulation and
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additionally provides a PC system emulation that filters bad device
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and memory access (such as PCI config space access to other devices
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than the initialized one).
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When choosing this option, x86emu will pass through all hardware
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accesses to memory and I/O devices to the underlying memory and I/O
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addresses. While this option prevents Option ROMs from doing dirty
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tricks with the CPU (such as installing SMM modules or hypervisors),
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they can still access all devices in the system.
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Enable this option for a good compromise between security and speed.
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config MULTIPLE_VGA_ADAPTERS
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bool
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default n
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config PCI_64BIT_PREF_MEM
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bool
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default n
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config HYPERTRANSPORT_PLUGIN_SUPPORT
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bool
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default n
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config PCIX_PLUGIN_SUPPORT
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bool
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default y
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config PCIEXP_PLUGIN_SUPPORT
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bool
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default y
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config AGP_PLUGIN_SUPPORT
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bool
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default y
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config CARDBUS_PLUGIN_SUPPORT
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bool
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default y
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config PCIEXP_COMMON_CLOCK
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prompt "Enable PCIe Common Clock"
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bool
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default n
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help
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Detect and enable Common Clock on PCIe links.
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config PCIEXP_ASPM
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prompt "Enable PCIe ASPM"
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bool
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default n
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help
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Detect and enable ASPM on PCIe links.
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