coreboot-kgpe-d16/src
Ronak Kanabar b77b446ca8 vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2114
The FSP-M/S headers added are generated as per FSP v2114.

Following UPDs are deprecated
- IedSize
- EnableC6Dram

Following UPDs are added
- TurboMode
- PavpEnable
- CnviMode
- CnviBtCore
- PchFivrExtV1p05RailEnabledStates
- PchFivrExtVnnRailSxEnabledStates
- PchFivrVccinAuxRetToLowCurModeVolTranTime
- PchFivrVccinAuxRetToHighCurModeVolTranTime
- PchFivrVccinAuxLowToHighCurModeVolTranTime
- PchLockDownGlobalSmi
- PchLockDownBiosInterface
- PchLockDownBiosLock

BUG=b:155054804
BRANCH=None
TEST=Build and boot JSLRVP
Cq-Depend: TBD

Change-Id: Id9355a1eccfbdc1e9a07b37cb3d8e3de125054d9
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41240
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
2020-05-26 21:10:25 +00:00
..
acpi acpi/device: Add a helper function to write SoundWire _ADR 2020-05-21 08:04:12 +00:00
arch Remove MAYBE_STATIC_BSS and ENV_STAGE_HAS_BSS_SECTION 2020-05-26 15:04:08 +00:00
commonlib src: Remove leading blank lines from SPDX header 2020-05-18 07:00:27 +00:00
console treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
cpu src: Remove leading blank lines from SPDX header 2020-05-18 07:00:27 +00:00
device device: Switch to resource allocator v4 by default treewide 2020-05-26 15:19:18 +00:00
drivers drivers/intel/pmc_mux/con: Add new PMC MUX & CON chip drivers 2020-05-26 20:51:32 +00:00
ec Remove MAYBE_STATIC_BSS and ENV_STAGE_HAS_BSS_SECTION 2020-05-26 15:04:08 +00:00
include device: Move resource allocation into a separate compilation unit 2020-05-26 15:15:21 +00:00
lib Remove MAYBE_STATIC_BSS and ENV_STAGE_HAS_BSS_SECTION 2020-05-26 15:04:08 +00:00
mainboard mb/google/nightfury: Enable max98390 amp 2020-05-26 15:24:13 +00:00
northbridge northbridge/intel/i945: Mark legacy VGA memory as reserved 2020-05-26 15:18:16 +00:00
security Remove MAYBE_STATIC_BSS and ENV_STAGE_HAS_BSS_SECTION 2020-05-26 15:04:08 +00:00
soc soc/amd/picasso: Use C00n for CPU ACPI string 2020-05-26 16:13:55 +00:00
southbridge sb/intel/i82801gx: Use macro instead of numbers 2020-05-26 15:12:19 +00:00
superio superio/ite/Makefile.inc: Add it8613e 2020-05-26 13:03:50 +00:00
vendorcode vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2114 2020-05-26 21:10:25 +00:00
Kconfig src: Remove leading blank lines from SPDX header 2020-05-18 07:00:27 +00:00