This is a minor set of changes to get DDR3 going.
Move compilation of DDR3 startup to the romstage. Fix a prototype that
was missing a void. Remove a function that is overly flexible, and
even though it is overly flexible only actually can handle one type of
RAM. Mainboards only support one type of DRAM, so create a function
to explicitly initialize the type of DDR we have -- DDR3.
With these changes, and the previous changes, google snow is ready to run
the ramstage.
Change-Id: I37e0ab0d2dbc1dd121fb175386a46bc2fb1285e5
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2224
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
b7e0535862