b85a87b7d6
Move the GPI interrupt routing selection between SMI/SCI from mainboards to southbridge. There is speculation if this is all just legacy APM stuff that could be removed with a followup. Change-Id: Iab14cf347584513793f417febc47f0559e17f5a5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Signed-off-by: Nicolas Reinecke <nr@das-labor.org> Reviewed-on: http://review.coreboot.org/7967 Tested-by: build bot (Jenkins) Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
169 lines
4 KiB
C
169 lines
4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008-2009 coresystems GmbH
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* Copyright (C) 2014 Vladimir Serbinenko
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <console/console.h>
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#include <cpu/x86/smm.h>
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#include <ec/acpi/ec.h>
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#include <ec/lenovo/h8/h8.h>
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#include <southbridge/intel/bd82x6x/nvs.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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#include <southbridge/intel/bd82x6x/me.h>
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#include <northbridge/intel/sandybridge/sandybridge.h>
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#include <cpu/intel/model_206ax/model_206ax.h>
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#define GPE_EC_SCI 1
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#define GPE_EC_WAKE 13
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/* The southbridge SMI handler checks whether gnvs has a
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* valid pointer before calling the trap handler
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*/
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extern global_nvs_t *gnvs;
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static void mainboard_smm_init(void)
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{
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printk(BIOS_DEBUG, "initializing SMI\n");
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/* Enable 0x1600/0x1600 register pair */
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ec_set_bit(0x00, 0x05);
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}
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int mainboard_io_trap_handler(int smif)
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{
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static int smm_initialized;
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if (!smm_initialized) {
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mainboard_smm_init();
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smm_initialized = 1;
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}
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switch (smif) {
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default:
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return 0;
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}
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/* On success, the IO Trap Handler returns 1
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* On failure, the IO Trap Handler returns a value != 1 */
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return 1;
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}
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static void mainboard_smi_brightness_up(void)
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{
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u8 value;
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if ((value = pci_read_config8(PCI_DEV(0, 2, 1), 0xf4)) < 0xf0)
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pci_write_config8(PCI_DEV(0, 2, 1), 0xf4, (value + 0x10) | 0xf);
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}
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static void mainboard_smi_brightness_down(void)
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{
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u8 value;
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if ((value = pci_read_config8(PCI_DEV(0, 2, 1), 0xf4)) > 0x10)
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pci_write_config8(PCI_DEV(0, 2, 1), 0xf4,
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(value - 0x10) & 0xf0);
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}
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static void mainboard_smi_handle_ec_sci(void)
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{
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u8 status = inb(EC_SC);
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u8 event;
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if (!(status & EC_SCI_EVT))
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return;
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event = ec_query();
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printk(BIOS_DEBUG, "EC event %02x\n", event);
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switch (event) {
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case 0x14:
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/* brightness up */
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mainboard_smi_brightness_up();
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break;
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case 0x15:
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/* brightness down */
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mainboard_smi_brightness_down();
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break;
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default:
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break;
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}
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}
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void mainboard_smi_gpi(u32 gpi_sts)
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{
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if (gpi_sts & (1 << GPE_EC_SCI))
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mainboard_smi_handle_ec_sci();
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}
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static int mainboard_finalized = 0;
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int mainboard_smi_apmc(u8 data)
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{
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switch (data) {
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case APM_CNT_ACPI_ENABLE:
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/* use 0x1600/0x1604 to prevent races with userspace */
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ec_set_ports(0x1604, 0x1600);
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/* route EC_SCI to SCI */
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gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI);
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/* discard all events, and enable attention */
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ec_write(0x80, 0x01);
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break;
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case APM_CNT_ACPI_DISABLE:
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/* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
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provide a EC query function */
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ec_set_ports(0x66, 0x62);
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/* route EC_SCI to SMI */
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gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI);
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/* discard all events, and enable attention */
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ec_write(0x80, 0x01);
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break;
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case APM_CNT_FINALIZE:
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printk(BIOS_DEBUG, "APMC: FINALIZE\n");
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if (mainboard_finalized) {
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printk(BIOS_DEBUG, "APMC#: Already finalized\n");
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return 0;
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}
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intel_me_finalize_smm();
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intel_pch_finalize_smm();
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intel_sandybridge_finalize_smm();
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intel_model_206ax_finalize_smm();
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mainboard_finalized = 1;
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break;
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default:
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break;
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}
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return 0;
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}
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void mainboard_smi_sleep(u8 slp_typ)
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{
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if (slp_typ == 3) {
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u8 ec_wake = ec_read(0x32);
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/* If EC wake events are enabled, enable wake on EC WAKE GPE. */
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if (ec_wake & 0x14) {
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/* Redirect EC WAKE GPE to SCI. */
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gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
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}
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}
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}
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