b890a1228d
As per discussion with lawyers[tm], it's not a good idea to
shorten the license header too much - not for legal reasons
but because there are tools that look for them, and giving
them a standard pattern simplifies things.
However, we got confirmation that we don't have to update
every file ever added to coreboot whenever the FSF gets a
new lease, but can drop the address instead.
util/kconfig is excluded because that's imported code that
we may want to synchronize every now and then.
$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} +
$ find * -type f
-a \! -name \*.patch \
-a \! -name \*_shipped \
-a \! -name LICENSE_GPL \
-a \! -name LGPL.txt \
-a \! -name COPYING \
-a \! -name DISCLAIMER \
-exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} +
Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/9233
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
114 lines
3.3 KiB
C
114 lines
3.3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 The Chromium OS Authors. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#include <string.h>
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#include <bootmode.h>
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#include <arch/io.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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#ifndef __PRE_RAM__
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#include <boot/coreboot_tables.h>
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#define GPIO_COUNT 6
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void fill_lb_gpios(struct lb_gpios *gpios)
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{
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device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0));
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u16 gpio_base = pci_read_config32(dev, GPIOBASE) & 0xfffe;
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if (!gpio_base)
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return;
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u32 gp_lvl = inl(gpio_base + 0x0c);
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u32 gp_lvl2 = inl(gpio_base + 0x38);
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/* u32 gp_lvl3 = inl(gpio_base + 0x48); */
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gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio));
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gpios->count = GPIO_COUNT;
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/* Write Protect: GPIO48 */
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gpios->gpios[0].port = 48;
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gpios->gpios[0].polarity = ACTIVE_LOW;
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gpios->gpios[0].value = (gp_lvl2 >> (48-32)) & 1;
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strncpy((char *)gpios->gpios[0].name,"write protect",
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GPIO_MAX_NAME_LENGTH);
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/* Recovery: GPIO22 */
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gpios->gpios[1].port = 22;
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gpios->gpios[1].polarity = ACTIVE_LOW;
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gpios->gpios[1].value = (gp_lvl >> 22) & 1;
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strncpy((char *)gpios->gpios[1].name,"recovery", GPIO_MAX_NAME_LENGTH);
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/* Developer: GPIO57 */
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gpios->gpios[2].port = 57;
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gpios->gpios[2].polarity = ACTIVE_LOW;
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gpios->gpios[2].value = (gp_lvl2 >> (57-32)) & 1;
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strncpy((char *)gpios->gpios[2].name,"developer", GPIO_MAX_NAME_LENGTH);
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/* Hard code the lid switch GPIO to open. */
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gpios->gpios[3].port = -1;
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gpios->gpios[3].polarity = ACTIVE_HIGH;
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gpios->gpios[3].value = 1;
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strncpy((char *)gpios->gpios[3].name,"lid", GPIO_MAX_NAME_LENGTH);
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/* Power Button */
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gpios->gpios[4].port = -1;
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gpios->gpios[4].polarity = ACTIVE_HIGH;
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gpios->gpios[4].value = 0;
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strncpy((char *)gpios->gpios[4].name,"power", GPIO_MAX_NAME_LENGTH);
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/* Did we load the VGA option ROM? */
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gpios->gpios[5].port = -1;
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gpios->gpios[5].polarity = ACTIVE_HIGH;
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gpios->gpios[5].value = gfx_get_init_done();
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strncpy((char *)gpios->gpios[5].name,"oprom", GPIO_MAX_NAME_LENGTH);
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}
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#endif
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int get_developer_mode_switch(void)
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{
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device_t dev;
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#ifdef __PRE_RAM__
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dev = PCI_DEV(0, 0x1f, 0);
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#else
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dev = dev_find_slot(0, PCI_DEVFN(0x1f,0));
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#endif
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u16 gpio_base = pci_read_config32(dev, GPIOBASE) & 0xfffe;
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u32 gp_lvl2 = inl(gpio_base + 0x38);
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/* Developer: GPIO17, active high */
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return (gp_lvl2 >> (57-32)) & 1;
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}
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int get_recovery_mode_switch(void)
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{
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device_t dev;
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#ifdef __PRE_RAM__
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dev = PCI_DEV(0, 0x1f, 0);
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#else
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dev = dev_find_slot(0, PCI_DEVFN(0x1f,0));
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#endif
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u16 gpio_base = pci_read_config32(dev, GPIOBASE) & 0xfffe;
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u32 gp_lvl = inl(gpio_base + 0x0c);
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/* Recovery: GPIO22, active low */
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return !((gp_lvl >> 22) & 1);
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}
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