Karthikeyan Ramasubramanian dd4741c7bd vendorcode/google/chromeos: Build CSE Board Reset in Romstage ... CSE Firmware Sync is being performed in romstage currently. But the CSE board reset is not included as part of romstage. This causes the CSE firmware sync to use global reset instead of EC assisted AP reset with the old Cr50 Firmware version. Include the board specific CSE reset in romstage. BUG=b:171731175,b:177795247 BRANCH=dedede,volteer,puff TEST=Ensured that the Drawlat boots to OS with both old(0.0.22) and new(0.6.7) Cr50 FW versions. Change-Id: I5e362271ffb68ffd5884279acd1ab0a462195a8a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49850 Reviewed-by: Evan Green <evgreen@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-01-22 22:53:07 +00:00
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amd	sb/amd/pi/hudson: Enable use of common GPIO API	2020-12-28 13:37:15 +00:00
cavium	{include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent	2020-09-01 03:06:04 +00:00
eltan	vc/eltan/security/verified_boot/vboot_check.c: Add check PROG_POSTCAR	2021-01-15 11:18:58 +00:00
google	vendorcode/google/chromeos: Build CSE Board Reset in Romstage	2021-01-22 22:53:07 +00:00
intel	{soc,vc,mb}/intel: Drop support for Cannon Lake SoC	2021-01-11 17:23:53 +00:00
siemens	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
Makefile.inc	vendorcode/eltan: Add vendor code for measured and verified boot	2019-06-04 10:41:53 +00:00