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Zheng Bao b8c473e32f amd/00730F01: Clean the Microcode updating 
According to the comments of
https://review.coreboot.org/c/coreboot/+/41719
, which is about Microcode patch for amd/picasso.
Change the code with the same way.

The changes include:
1. combine the microcode_xxx.c and update_microcode.c
   into one source.
2. Redefine the microcode updating function to eliminate
   the parameter. Get the revision ID in the black box.
   Reduce the depth of function calls.
3. Get the revision ID by bitwise calculation instead of
   lookup table.
4. Reduce the confusing type casts.
5. Squash some lines.

We do not change the way it used to be. The code assume
only one microcode is integrated in CBFS. If needed in future,
41719 is the example of integrating multiple binaries.

And, 41719 depends on the definition in this patch.

Change-Id: I8b0da99db0d3189058f75e199f05492c4e6c5881
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42094
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
 		2020-06-10 02:59:29 +00:00
3rdparty 3rdparty/amd_blobs: Update to include APCB_magic.bin 2020-05-27 15:59:45 +00:00
Documentation mb,soc/intel: Rename acpi_fill_in_fadt() to acpi_fill_fadt() 2020-06-07 21:45:45 +00:00
LICENSES drivers: Use SPDX identifiers 2020-05-25 22:19:21 +00:00
configs mb/dell/optiplex_9010: Add Dell OptiPlex 9010 SFF support 2020-05-16 17:38:46 +00:00
payloads payloads/external: s/PROMT/PROMPT/g 2020-06-06 20:26:35 +00:00
src amd/00730F01: Clean the Microcode updating 2020-06-10 02:59:29 +00:00
tests tests: Always run all unit tests 2020-05-28 09:48:13 +00:00
util util/amdfwtool: Add option for setting PSP/FW shared memory location 2020-06-08 14:19:24 +00:00
.checkpatch.conf
…
.clang-format lint/clang-format: set to 96 chars per line 2019-06-13 20:14:00 +00:00
.editorconfig Add .editorconfig file 2019-09-10 12:52:18 +00:00
.gitignore cbfstool: Build vboot library 2020-03-23 08:34:23 +00:00
.gitmodules submodules: Add new submodule 3rdparty/cmocka 2020-05-26 16:20:49 +00:00
.gitreview
…
AUTHORS AUTHORS, util/: Drop individual copyright notices 2020-05-09 21:21:32 +00:00
COPYING
…
MAINTAINERS MAINTAINERS: Add myself as some northbridges' maintainer 2020-06-09 06:24:46 +00:00
Makefile Makefile: Use SPDX identifier 2020-05-23 21:03:17 +00:00
Makefile.inc Makefile: Add missing APCB_EDIT_TOOL variable 2020-05-27 16:00:05 +00:00
README.md README.md: Remove link to deprecated wiki 2019-11-16 20:39:55 +00:00
gnat.adc treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
toolchain.inc Remove MAYBE_STATIC_BSS and ENV_STAGE_HAS_BSS_SECTION 2020-05-26 15:04:08 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.