a5b7ddf940
This will allow enumerating an xHCI controller to allow dynamically generating the ACPI device nodes. BUG=b:154756391 TEST=Boot trembyle and see capabilities printed on console xHCI Supported Protocol: Major: 0x2, Minor: 0x0, Protocol: 'USB ' Port Offset: 1, Port Count: 2 xHCI Supported Protocol: Major: 0x3, Minor: 0x10, Protocol: 'USB ' Port Offset: 3, Port Count: 1 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I3065c3fffad01b5378a55cfe904f971079b13d0f Reviewed-on: https://review.coreboot.org/c/coreboot/+/41899 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
86 lines
2.2 KiB
C
86 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <device/xhci.h>
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#include <console/console.h>
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#include <device/pci_def.h>
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#include <arch/mmio.h>
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union xhci_ext_caps_header {
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uint32_t val;
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struct {
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uint32_t cap_id : 8;
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uint32_t next_ptr : 8;
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uint32_t reserved : 16;
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};
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};
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enum cb_err xhci_for_each_ext_cap(const struct device *device, void *context,
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void (*callback)(void *context,
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const struct xhci_ext_cap *cap))
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{
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struct resource *res;
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uint32_t *ext_cap_ptr;
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uint32_t ext_caps_word_offset;
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union xhci_ext_caps_header header;
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struct xhci_ext_cap cap;
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if (!device || !callback)
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return CB_ERR_ARG;
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res = probe_resource(device, PCI_BASE_ADDRESS_0);
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if (!res) {
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printk(BIOS_ERR, "%s: Unable to find BAR resource for %s\n", __func__,
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dev_path(device));
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return CB_ERR;
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}
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if (!(res->flags & IORESOURCE_ASSIGNED)) {
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printk(BIOS_ERR, "%s: BAR is is not assigned\n", __func__);
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return CB_ERR;
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}
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if (res->limit > 0xFFFFFFFF) {
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printk(BIOS_ERR, "%s: 64-bit BAR is not supported\n", __func__);
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return CB_ERR;
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}
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ext_caps_word_offset = read16(res2mmio(res, XHCI_HCCPARAMS1_XECP, 0));
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if (!ext_caps_word_offset) {
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printk(BIOS_ERR, "%s: No extended capabilities defined\n", __func__);
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return CB_ERR;
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}
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ext_cap_ptr = res2mmio(res, ext_caps_word_offset << 2, 0);
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while ((uintptr_t)ext_cap_ptr < (uintptr_t)res->limit) {
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header.val = read32(ext_cap_ptr);
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cap.cap_id = header.cap_id;
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if (header.cap_id == XHCI_ECP_CAP_ID_SUPP) {
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cap.supported_protocol.reg0 = header.val;
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cap.supported_protocol.reg1 = read32(ext_cap_ptr + 1);
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cap.supported_protocol.reg2 = read32(ext_cap_ptr + 2);
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}
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callback(context, &cap);
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if (!header.next_ptr)
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break;
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ext_cap_ptr += header.next_ptr;
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}
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return CB_SUCCESS;
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}
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void xhci_print_supported_protocol(const struct xhci_supported_protocol *supported_protocol)
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{
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printk(BIOS_DEBUG, "xHCI Supported Protocol:\n");
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printk(BIOS_DEBUG, " Major: %#x, Minor: %#x, Protocol: '%.*s'\n",
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supported_protocol->major_rev, supported_protocol->minor_rev,
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(int)sizeof(supported_protocol->name), supported_protocol->name);
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printk(BIOS_DEBUG, " Port Offset: %d, Port Count: %d\n",
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supported_protocol->port_offset, supported_protocol->port_count);
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}
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