b98dec032f
It turns out that the exynos5-common code previously imported from u-boot is not common code at all but very specific to the 5250 and not compatible with the 5450. Hence, unify the directories exynos5250 and exynos5-common. We will try to factor out common code while progressing with the 5450 port. Change-Id: Iab595e66fcd01eda8365c96fb8bef896f7602f03 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3641 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
119 lines
3.3 KiB
C
119 lines
3.3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Google, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <boot/coreboot_tables.h>
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#include <console/console.h>
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#include <ec/google/chromeec/ec.h>
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#include <ec/google/chromeec/ec_commands.h>
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#include <string.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include <cpu/samsung/exynos5250/cpu.h>
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#include <cpu/samsung/exynos5250/gpio.h>
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enum {
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ACTIVE_LOW = 0,
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ACTIVE_HIGH = 1
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};
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enum {
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WP_GPIO = 6,
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RECMODE_GPIO = 0,
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LID_GPIO = 5,
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POWER_GPIO = 3
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};
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static struct exynos5_gpio_part1 *gpio_pt1 =
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(struct exynos5_gpio_part1 *)EXYNOS5_GPIO_PART1_BASE;
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static struct exynos5_gpio_part2 *gpio_pt2 =
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(struct exynos5_gpio_part2 *)EXYNOS5_GPIO_PART2_BASE;
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void fill_lb_gpios(struct lb_gpios *gpios)
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{
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int count = 0;
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/* Write Protect: active low */
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gpios->gpios[count].port = EXYNOS5_GPD1;
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gpios->gpios[count].polarity = ACTIVE_LOW;
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gpios->gpios[count].value = s5p_gpio_get_value(&gpio_pt1->d1, WP_GPIO);
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strncpy((char *)gpios->gpios[count].name, "write protect",
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GPIO_MAX_NAME_LENGTH);
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count++;
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/* Recovery: active low */
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gpios->gpios[count].port = -1;
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gpios->gpios[count].polarity = ACTIVE_HIGH;
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gpios->gpios[count].value = get_recovery_mode_switch();
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strncpy((char *)gpios->gpios[count].name, "recovery",
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GPIO_MAX_NAME_LENGTH);
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count++;
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/* Lid: active high */
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gpios->gpios[count].port = EXYNOS5_GPX3;
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gpios->gpios[count].polarity = ACTIVE_HIGH;
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gpios->gpios[count].value = s5p_gpio_get_value(&gpio_pt2->x3, LID_GPIO);
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strncpy((char *)gpios->gpios[count].name, "lid", GPIO_MAX_NAME_LENGTH);
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count++;
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/* Power: virtual GPIO active low */
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gpios->gpios[count].port = EXYNOS5_GPX1;
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gpios->gpios[count].polarity = ACTIVE_LOW;
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gpios->gpios[count].value =
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s5p_gpio_get_value(&gpio_pt2->x1, POWER_GPIO);
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strncpy((char *)gpios->gpios[count].name, "power",
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GPIO_MAX_NAME_LENGTH);
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count++;
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/* Developer: virtual GPIO active high */
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gpios->gpios[count].port = -1;
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gpios->gpios[count].polarity = ACTIVE_HIGH;
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gpios->gpios[count].value = get_developer_mode_switch();
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strncpy((char *)gpios->gpios[count].name, "developer",
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GPIO_MAX_NAME_LENGTH);
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count++;
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gpios->size = sizeof(*gpios) + (count * sizeof(struct lb_gpio));
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gpios->count = count;
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printk(BIOS_ERR, "Added %d GPIOS size %d\n", count, gpios->size);
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}
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int get_developer_mode_switch(void)
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{
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return 0;
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}
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int get_recovery_mode_switch(void)
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{
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uint32_t ec_events;
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/* The GPIO is active low. */
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if (!s5p_gpio_get_value(&gpio_pt1->y1, RECMODE_GPIO))
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return 1;
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ec_events = google_chromeec_get_events_b();
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return !!(ec_events &
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY));
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}
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int get_recovery_mode_from_vbnv(void)
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{
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return 0;
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}
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