b9a7877568
rk3288 and rk3399 use same edp IP, move soc specific setting to soc/display, and move edp driver to common, so rk3399 can reuse this driver. BUG=chrome-os-partner:52460 BRANCH=none TEST= test on jerry and mighty, edp panel can work Change-Id: Ie3f3e8468b2323994af8a002413bf93b3edc8026 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 64bb4b2c7ed373d9730c9aa0b0896a32164fc7ee Original-Change-Id: Ie5c15a81849a02d1c0457e36ed00fbe2d47961fb Original-Signed-off-by: Lin Huang <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/340504 Original-Commit-Ready: Vadim Bendebury <vbendeb@chromium.org> Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/14725 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
84 lines
2.4 KiB
Makefile
84 lines
2.4 KiB
Makefile
##
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## This file is part of the coreboot project.
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##
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## Copyright 2014 Rockchip Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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ifeq ($(CONFIG_SOC_ROCKCHIP_RK3288),y)
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IDBTOOL = util/rockchip/make_idb.py
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bootblock-y += bootblock.c
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bootblock-y += ../common/cbmem.c
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ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
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bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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endif
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bootblock-y += timer.c
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bootblock-y += clock.c
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bootblock-y += ../common/spi.c
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bootblock-y += ../common/gpio.c
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bootblock-y += gpio.c
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bootblock-y += ../common/i2c.c
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bootblock-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
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bootblock-y += ../common/rk808.c
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verstage-y += ../common/spi.c
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verstage-y += timer.c
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verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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verstage-y += ../common/gpio.c
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verstage-y += gpio.c
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verstage-y += clock.c
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libverstage-y += crypto.c
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verstage-y += ../common/i2c.c
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verstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
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romstage-y += ../common/cbmem.c
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romstage-y += timer.c
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romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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romstage-y += ../common/i2c.c
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romstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
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romstage-y += clock.c
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romstage-y += ../common/gpio.c
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romstage-y += gpio.c
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romstage-y += ../common/spi.c
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romstage-y += sdram.c
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romstage-y += ../common/rk808.c
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romstage-y += ../common/pwm.c
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romstage-y += tsadc.c
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ramstage-y += soc.c
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ramstage-y += ../common/cbmem.c
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ramstage-y += timer.c
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ramstage-y += ../common/i2c.c
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ramstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
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ramstage-y += clock.c
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ramstage-y += ../common/spi.c
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ramstage-y += sdram.c
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ramstage-y += ../common/gpio.c
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ramstage-y += gpio.c
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ramstage-y += ../common/rk808.c
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ramstage-y += ../common/pwm.c
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ramstage-y += vop.c
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ramstage-y += ../common/edp.c
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ramstage-y += hdmi.c
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ramstage-y += display.c
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ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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CPPFLAGS_common += -Isrc/soc/rockchip/rk3288/include
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CPPFLAGS_common += -Isrc/soc/rockchip/common/include
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$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
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@printf "Generating: $(subst $(obj)/,,$(@))\n"
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@mkdir -p $(dir $@)
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@$(IDBTOOL) --from=$< --to=$@ --enable-align --chip=RK32
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endif
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