David Hendricks b9d59bb630 pistachio: Use 1.8433179 MHz for UART refclk ... BUG=chrome-os-partner:31438 BRANCH=none TEST=built and booted on urara w/ follow-up patches Change-Id: I3b03ce937e68539343e58b01e3bb714dd1f8c2dd Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 9493c57a14c8ab074baac1c065c6f39050dd9b2f Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: I8e50c99913ea155ba0d5699f4789c1fe38b46808 Original-Reviewed-on: https://chromium-review.googlesource.com/243210 Original-Reviewed-by: Ionela Voinescu <ionela.voinescu@imgtec.com> Reviewed-on: http://review.coreboot.org/9666 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>		2015-04-14 12:08:09 +02:00
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imgtec	pistachio: Use 1.8433179 MHz for UART refclk	2015-04-14 12:08:09 +02:00
intel	broadwell: Work around VBIOS framebuffer issue	2015-04-13 20:25:03 +02:00
marvell	CBFS: Automate ROM image layout and remove hardcoded offsets	2015-04-14 09:01:27 +02:00
nvidia	tegra132: lock down VPR	2015-04-14 12:07:39 +02:00
qualcomm	CBFS: Automate ROM image layout and remove hardcoded offsets	2015-04-14 09:01:27 +02:00
rockchip	rk3288: Fix memlayout to allow a little more bootblock space	2015-04-14 09:03:57 +02:00
samsung	timer: Reestablish init_timer(), consolidate timer initialization calls	2015-04-14 09:03:28 +02:00
ucb	kconfig: drop intermittend forwarder files	2015-04-07 17:40:28 +02:00
Makefile.inc	cosmos: add template for soc and board files	2015-04-09 00:21:21 +02:00