coreboot-kgpe-d16/src/southbridge
Aaron Durbin b9ea8b3fb0 lynxpoint: PMIR register rename
The register that controls global reset is named the Power
Mangement Initialization Regiser (PMIR). Update the defines
to reflect the documentation.

Additionally, there is no core well reset control according to the
EDS. There is, however, a CF9 lock field to lock this register down.

Change-Id: I773c33bec63a06cdb869eb9f94553d476e492798
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2619
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-14 06:33:32 +01:00
..
amd AMD CIMx SB800: Enable AHCI mode for SATA controller by default 2013-03-12 22:52:44 +01:00
broadcom GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
intel lynxpoint: PMIR register rename 2013-03-14 06:33:32 +01:00
nvidia GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
rdc GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
ricoh GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
sis GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
ti GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
via GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
Kconfig Add support for RDC R8610 Southbridge 2012-03-27 18:39:05 +02:00
Makefile.inc Add support for RDC R8610 Southbridge 2012-03-27 18:39:05 +02:00