coreboot-kgpe-d16/src
Aaron Durbin baa1e38217 rambi: make ramids non-legacy gpio inputs
The romstage code for rambi uses the mmio way of reading
inputs. However, this is a problem is the GPIOs are set up
as legacy mode. Subsequent warm resets mean the ram_id is
read incorrectly. Ensure the ram_id is read consistently
by keeping the GPIOs for ram_id in mmio mode.

BUG=chrome-os-partner:24085
BRANCH=None
TEST=Built and booted. And rebooted. Now seeing consistent ram_id
     values on warm resets.

Change-Id: Ieff98c000be80998854f325754f1e819975d2be5
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177230
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/4977
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-05-07 22:06:10 +02:00
..
arch Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
console console: Fix UART selection prompt 2014-04-30 23:47:28 +02:00
cpu Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
device Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
drivers drivers/pc80/Kconfig: Do not init PS/2 keyboard if GRUB 2 is chosen as payload 2014-05-02 15:05:07 +02:00
ec Declare recovery and developer modes outside ChromeOS 2014-05-01 15:38:41 +02:00
include superio/common/conf_mode: Provide another common pnp entry/exit 2014-05-07 21:36:48 +02:00
lib reg_script: add iosf lpss port access 2014-05-07 12:05:01 +02:00
mainboard rambi: make ramids non-legacy gpio inputs 2014-05-07 22:06:10 +02:00
northbridge northbridge/intel/sandybridge/pei_data.h: Fix typo in hig*h*est in comment 2014-05-06 13:55:39 +02:00
soc baytrail: enable caching and prefetching in spi controller 2014-05-07 22:06:03 +02:00
southbridge AGESA SPI: Fix Kconfig options 2014-04-29 17:31:40 +02:00
superio superio/common/conf_mode: Provide another common pnp entry/exit 2014-05-07 21:36:48 +02:00
vendorcode Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
Kconfig Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00