baf27dbaeb
This patch flips the default of CONFIG_NO_CBFS_MCACHE so the feature is enabled by default. Some older chipsets with insufficient SRAM/CAR space still have it explicitly disabled. All others get the new section added to their memlayout... 8K seems like a sane default to start with. Change-Id: I0abd1c813aece6e78fb883f292ce6c9319545c44 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38424 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> |
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.. | ||
include/soc | ||
bootblock.c | ||
ddp.c | ||
decompressor.c | ||
dramc_init_setting.c | ||
dramc_param.c | ||
dramc_pi_basic_api.c | ||
dramc_pi_calibration_api.c | ||
dsi.c | ||
emi.c | ||
gpio.c | ||
i2c.c | ||
Kconfig | ||
Makefile.inc | ||
md_ctrl.c | ||
memlayout.ld | ||
memory.c | ||
mmu_operations.c | ||
mt6358.c | ||
mt8183.c | ||
mtcmos.c | ||
pll.c | ||
pmic_wrap.c | ||
rtc.c | ||
soc.c | ||
spi.c | ||
spm.c | ||
sspm.c |