coreboot-kgpe-d16/src/soc
Jonathan Zhang bb25c59e90 soc/intel/xeon_sp/cpx: search IIO_UDS HOB once when creating DMAR table
IIO_UDS HOB was searched several times during the creation of DMAR table.
Reduce it to only once to improve boot time.

Both DRHD and ATSR subtable creations involve addition of PCIe bridge
device entries, combine the functions with
acpi_create_dmar_ds_pci_br_for_port().

When looping through ports to create PCIe bridge device entries,
use MAX_PORTS intead of NUMBER_PORTS_PER_SOCKET to improve boot time.

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I469cd8473c50e105daeda6c5607592ae7cef6032
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45376
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
2020-09-21 08:06:09 +00:00
..
amd soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support 2020-09-20 17:24:40 +00:00
cavium include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00
intel soc/intel/xeon_sp/cpx: search IIO_UDS HOB once when creating DMAR table 2020-09-21 08:06:09 +00:00
mediatek soc/mediatek/mt8192: Init PLL in bootblock 2020-09-17 06:56:55 +00:00
nvidia include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00
qualcomm sc7180: report hardware watchdog reset after reboot 2020-09-16 00:44:09 +00:00
rockchip include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00
samsung include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00
sifive include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00
ti include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00
ucb