coreboot-kgpe-d16

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Carl-Daniel Hailfinger bba113ec07 If get_pbus() is called for a device which has no parent/ancestor bus with nonzero PCI bus operations, get_pbus() will get stuck in a silent endless loop. Detect the endless loop and break out with an error message. Such a situation can happen if the device tree is not yet initialized/walked completely. This fixes the unexplainable hang if pci_{read,write}_config{8,16,32}was used in early mainboard code for the AMD DBM690T. Instead, the code will now die() with a meaningful error message. Thanks to Ward Vandewege for testing my patches to track down that bug. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3972 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2009-03-05 19:33:12 +00:00
documentation	Rename almost all occurences of LinuxBIOS to coreboot.	2008-01-18 15:08:58 +00:00
payloads	libpayload: Fix build when both USB and PS/2 keyboard support is disabled	2009-02-22 23:13:33 +00:00
src	If get_pbus() is called for a device which has no parent/ancestor bus	2009-03-05 19:33:12 +00:00
targets	This target is dead.	2009-02-13 20:20:21 +00:00
util	flashrom: Use helper functions to access flash chips.	2009-03-05 19:24:22 +00:00
COPYING	update license template.	2006-08-12 22:03:36 +00:00
NEWS	Rename almost all occurences of LinuxBIOS to coreboot.	2008-01-18 15:08:58 +00:00
README	Rename almost all occurences of LinuxBIOS to coreboot.	2008-01-18 15:08:58 +00:00

README

-------------------------------------------------------------------------------
Coreboot README
-------------------------------------------------------------------------------

Coreboot is a Free Software project aimed at replacing the proprietary
BIOS you can find in most of today's computers.

It performs just a little bit of hardware initialization and then executes
one of many possible payloads, e.g. a Linux kernel.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot. Examples include:

 * A Linux kernel
 * FILO (a simple bootloader with filesystem support)
 * GRUB2 (a free bootloader; support is in development)
 * OpenBIOS (a free IEEE1275-1994 Open Firmware implementation)
 * Open Firmware (a free IEEE1275-1994 Open Firmware implementation)
 * SmartFirmware (a free IEEE1275-1994 Open Firmware implementation)
 * GNUFI (a free, UEFI-compatible firmware)
 * Etherboot (for network booting and booting from raw IDE or FILO)
 * ADLO (for booting Windows 2000 or OpenBSD)
 * Plan 9 (a distributed operating system)
 * memtest86 (for testing your RAM)


Supported Hardware
------------------

Coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

Coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files (mostly those derived from the Linux kernel) are licensed under
the "GPL, version 2". For some parts, which were derived from other projects,
other (GPL-compatible) licenses may apply. Please check the individual
source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.