Angel Pons bc04997f75 nb/intel/haswell/gma.c: Add ULX PCI device IDs ... Change-Id: Ida3d2dcdf89342b084c8e1fbf3fae7e47a7238d2 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50137 Reviewed-by: Jamal Wright <Crabstorage@getbackinthe.kitchen> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-08-02 14:58:56 +00:00
..
acpi	arch/x86/acpi: Add code for KEY_MICMUTE and KEY_KBDILLUMTOGGLE	2021-07-31 09:15:23 +00:00
arch	arch/x86/thread: Add #error when compiling for x86_64	2021-07-29 09:12:24 +00:00
commonlib	commonlib: Add timestamp strings for TS_FSP_MULTI_PHASE_SI_INIT_x	2021-07-29 09:10:45 +00:00
console
cpu	cpu/x86/mp_init: don't wait between INIT and SIPI for X86_AMD_INIT_SIPI	2021-07-27 14:00:32 +00:00
device	device/pci_rom: Make ON_DEVICE_ROM_LOAD condition truthy	2021-07-20 16:52:35 +00:00
drivers	src/drivers/intel/fsp2_0: allow larger FSP 2.0 header	2021-07-24 15:18:43 +00:00
ec	ec/roda/it8518/acpi: Remove unnecessary assignments	2021-07-28 13:50:59 +00:00
include	arch/x86/acpi: Add code for KEY_MICMUTE and KEY_KBDILLUMTOGGLE	2021-07-31 09:15:23 +00:00
lib	arch/x86,lib/thread: Enable thread support in romstage	2021-07-26 07:30:48 +00:00
mainboard	mb/google/dedede/var/boten: Set the xHCI LFPS period sampling off time to 0ms	2021-07-31 09:14:50 +00:00
northbridge	nb/intel/haswell/gma.c: Add ULX PCI device IDs	2021-08-02 14:58:56 +00:00
security	vboot/secdata_tpm: Add WRITE_STCLEAR attr to RW ARB spaces	2021-07-26 07:27:48 +00:00
soc	soc/amd/common/block/acpi: Add IVRS kconfig	2021-07-31 09:15:37 +00:00
southbridge	soc/amd/common/block/acpimmio: add Kconfig option for biosram accessors	2021-07-26 19:34:20 +00:00
superio
vendorcode	vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2265_01	2021-07-30 17:32:49 +00:00
Kconfig