Marshall Dawson 5b9062f3f6 soc/amd/common: Correct SPI FIFO size check ... When checking that command and data fit in the FIFO, don't count the first byte. The command doesn't go through the FIFO. TEST=confirm error (4+68>71) goes away on Mandolin BUG=b:146225550 Change-Id: Ica2ca514deea401c9c5396913087e07a12ab3cf3 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37721 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Eric Peers <epeers@google.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Martin Roth <martinroth@google.com>		2019-12-27 17:15:19 +00:00
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amd	soc/amd/common: Correct SPI FIFO size check	2019-12-27 17:15:19 +00:00
cavium	soc/{amd,cavium,mediatek,sifive}: Remove unused <stdlib.h>	2019-12-19 05:38:43 +00:00
intel	arch/x86: Remove <arch/cbfs.h>	2019-12-27 09:01:12 +00:00
mediatek	soc/mediatek/mt8183: Use DDR clock to compute Tx delay cell	2019-12-20 17:57:03 +00:00
nvidia	src/soc/nvidia: Remove unused <stdlib.h>	2019-12-19 04:06:52 +00:00
qualcomm	src: Remove unused include <string.h>	2019-12-26 10:45:37 +00:00
rockchip	src: Replace min/max() with MIN/MAX()	2019-12-20 17:49:29 +00:00
samsung	src/soc/samsung: Remove unused <stdlib.h>	2019-12-19 05:39:09 +00:00
sifive	src: Replace min/max() with MIN/MAX()	2019-12-20 17:49:29 +00:00
ucb	mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in qemu/spike.	2019-12-06 15:09:48 +00:00