46514c2b87
This change defines a Kconfig variable MEMLAYOUT_LD_FILE which allows SoC/mainboard to provide a linker file for the platform. x86 already provides a default memlayout.ld under src/arch/x86. With this new Kconfig variable, it is possible for the SoC/mainboard code for x86 to provide a custom linker file as well. Makefile.inc is updated for all architectures to use this new Kconfig variable instead of assuming memlayout.ld files under a certain path. All non-x86 boards used memlayout.ld under mainboard directory. However, a lot of these boards were simply including the memlayout from SoC. So, this change also updates these mainboards and SoCs to define the Kconfig as required. BUG=b:155322763 TEST=Verified that abuild with --timeless option results in the same coreboot.rom image for all boards. Change-Id: I6a7f96643ed0519c93967ea2c3bcd881a5d6a4d6 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42292 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
29 lines
634 B
Makefile
29 lines
634 B
Makefile
## SPDX-License-Identifier: GPL-2.0-only
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# Add a handler for BCT config files
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$(call add-special-class,bct-cfg)
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bct-cfg-handler= $(eval $(obj)/generated/bct.cfg: $(1)$(2))
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$(obj)/generated/bct.cfg:
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@printf " CAT $(subst $(obj)/,,$(@))\n"
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cat $^ > $@
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subdirs-y += bct
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bootblock-y += bootblock.c
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bootblock-y += pmic.c
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bootblock-y += reset.c
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verstage-y += chromeos.c
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verstage-y += reset.c
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romstage-y += reset.c
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romstage-y += romstage.c
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romstage-y += chromeos.c
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romstage-y += sdram_configs.c
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ramstage-y += boardid.c
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ramstage-y += mainboard.c
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ramstage-y += reset.c
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ramstage-y += chromeos.c
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ramstage-y += sdram_configs.c
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