31 lines
833 B
C
31 lines
833 B
C
#ifndef DEVICE_HYPERTRANSPORT_DEF_H
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#define DEVICE_HYPERTRANSPORT_DEF_H
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#define HT_FREQ_200Mhz 0
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#define HT_FREQ_300Mhz 1
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#define HT_FREQ_400Mhz 2
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#define HT_FREQ_500Mhz 3
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#define HT_FREQ_600Mhz 4
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#define HT_FREQ_800Mhz 5
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#define HT_FREQ_1000Mhz 6
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#define HT_FREQ_1200Mhz 7
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#define HT_FREQ_1400Mhz 8
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#define HT_FREQ_1600Mhz 9
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#define HT_FREQ_1800Mhz 10
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#define HT_FREQ_2000Mhz 11
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#define HT_FREQ_2200Mhz 12
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#define HT_FREQ_2400Mhz 13
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#define HT_FREQ_2600Mhz 14
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#define HT_FREQ_VENDOR 15 /* AMD defines this to be 100Mhz */
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static inline bool offset_unit_id(bool is_sb_ht_chain)
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{
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bool need_offset = (CONFIG_HT_CHAIN_UNITID_BASE != 1)
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|| (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20);
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return need_offset && (!CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
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|| is_sb_ht_chain);
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}
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#endif /* DEVICE_HYPERTRANSPORT_DEF_H */
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