GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
coreboot-kgpe-d16/src
History
Aaron Durbin bd74a4b2d2 coreboot: common stage cache 
Many chipsets were using a stage cache for reference code
or when using a relocatable ramstage. Provide a common
API for the chipsets to use while reducing code duplication.

Change-Id: Ia36efa169fe6bd8a3dbe07bf57a9729c7edbdd46
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8625
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
 		2015-04-22 17:55:08 +02:00
..
arch armv8/secmon: Disable and Enable GIC in PSCI path 2015-04-22 09:03:01 +02:00
console Add console wrapper for UART driver 2015-04-14 21:25:34 +02:00
cpu coreboot: common stage cache 2015-04-22 17:55:08 +02:00
device device: Add class and subclass name support 2015-04-22 08:55:29 +02:00
drivers elog: use CONFIG_RTC 2015-04-22 16:18:19 +02:00
ec chromeec: lpc: Add variant MEC IO 2015-04-22 08:58:13 +02:00
include coreboot: common stage cache 2015-04-22 17:55:08 +02:00
lib coreboot: common stage cache 2015-04-22 17:55:08 +02:00
mainboard google/*: Add MAINBOARD_HAS_CHROMEOS where appropriate 2015-04-22 16:16:08 +02:00
northbridge northbridge/amd/agesa/familyXY: Make NULL device op explicit 2015-04-09 19:34:22 +02:00
soc coreboot: common stage cache 2015-04-22 17:55:08 +02:00
southbridge southbridge/intel/bd82x6x: Add LPC id 0x1e49 for B75 chipset 2015-04-20 23:51:34 +02:00
superio kconfig: drop intermittend forwarder files 2015-04-07 17:40:28 +02:00
vendorcode chromeos: fix some compilation issues 2015-04-22 16:18:43 +02:00
Kconfig rtc: add config flag to denote rtc API availability 2015-04-22 16:18:13 +02:00