164 lines
4.2 KiB
C
164 lines
4.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2003 Eric Biederman
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* Copyright (C) 2006-2010 coresystems GmbH
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* Copyright (C) 2014 Imagination Technologies
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#include <arch/io.h>
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#include <boot/coreboot_tables.h>
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#include <console/console.h>
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#include <console/uart.h>
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#include <device/device.h>
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#include <delay.h>
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#include <drivers/uart/uart8250reg.h>
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/* Should support 8250, 16450, 16550, 16550A type UARTs */
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/* Expected character delay at 1200bps is 9ms for a working UART
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* and no flow-control. Assume UART as stuck if shift register
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* or FIFO takes more than 50ms per character to appear empty.
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*/
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#define SINGLE_CHAR_TIMEOUT (50 * 1000)
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#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT)
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#define UART_SHIFT 2
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#define GEN_ACCESSOR(name, idx) \
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static inline uint8_t read_##name(unsigned base_port) \
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{ \
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return read8(base_port + (idx << UART_SHIFT)); \
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} \
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\
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static inline void write_##name(unsigned base_port, uint8_t val) \
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{ \
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write8(base_port + (idx << UART_SHIFT), val); \
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}
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GEN_ACCESSOR(rbr, UART8250_RBR)
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GEN_ACCESSOR(tbr, UART8250_TBR)
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GEN_ACCESSOR(ier, UART8250_IER)
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GEN_ACCESSOR(fcr, UART8250_FCR)
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GEN_ACCESSOR(lcr, UART8250_LCR)
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GEN_ACCESSOR(mcr, UART8250_MCR)
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GEN_ACCESSOR(lsr, UART8250_LSR)
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GEN_ACCESSOR(dll, UART8250_DLL)
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GEN_ACCESSOR(dlm, UART8250_DLM)
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static int uart8250_mem_can_tx_byte(unsigned base_port)
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{
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return read_lsr(base_port) & UART8250_LSR_THRE;
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}
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static void uart8250_mem_tx_byte(unsigned base_port, unsigned char data)
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{
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unsigned long int i = SINGLE_CHAR_TIMEOUT;
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while (i-- && !uart8250_mem_can_tx_byte(base_port))
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udelay(1);
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write_tbr(base_port, data);
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}
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static void uart8250_mem_tx_flush(unsigned base_port)
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{
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unsigned long int i = FIFO_TIMEOUT;
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while (i-- && !(read_lsr(base_port) & UART8250_LSR_TEMT))
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udelay(1);
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}
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static int uart8250_mem_can_rx_byte(unsigned base_port)
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{
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return read_lsr(base_port) & UART8250_LSR_DR;
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}
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static unsigned char uart8250_mem_rx_byte(unsigned base_port)
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{
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unsigned long int i = SINGLE_CHAR_TIMEOUT;
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while (i-- && !uart8250_mem_can_rx_byte(base_port))
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udelay(1);
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if (i)
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return read_rbr(base_port);
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else
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return 0x0;
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}
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static void uart8250_mem_init(unsigned base_port, unsigned divisor)
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{
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/* Disable interrupts */
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write_ier(base_port, 0x0);
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/* Enable FIFOs */
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write_fcr(base_port, UART8250_FCR_FIFO_EN);
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/* Assert DTR and RTS so the other end is happy */
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write_mcr(base_port, UART8250_MCR_DTR | UART8250_MCR_RTS);
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/* DLAB on */
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write_lcr(base_port, UART8250_LCR_DLAB | CONFIG_TTYS0_LCS);
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write_dll(base_port, divisor & 0xFF);
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write_dlm(base_port, (divisor >> 8) & 0xFF);
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/* Set to 3 for 8N1 */
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write_lcr(base_port, CONFIG_TTYS0_LCS);
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}
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unsigned int uart_platform_refclk(void)
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{
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/* 1.8433179 MHz */
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return 1843318;
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}
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void uart_init(int idx)
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{
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u32 base = CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
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if (!base)
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return;
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unsigned int div;
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div = uart_baudrate_divisor(CONFIG_TTYS0_BAUD,
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uart_platform_refclk(), 16);
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uart8250_mem_init(base, div);
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}
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void uart_tx_byte(int idx, unsigned char data)
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{
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uart8250_mem_tx_byte(CONFIG_CONSOLE_SERIAL_UART_ADDRESS, data);
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}
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unsigned char uart_rx_byte(int idx)
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{
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return uart8250_mem_rx_byte(CONFIG_CONSOLE_SERIAL_UART_ADDRESS);
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}
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void uart_tx_flush(int idx)
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{
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uart8250_mem_tx_flush(CONFIG_CONSOLE_SERIAL_UART_ADDRESS);
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}
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#ifndef __PRE_RAM__
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void uart_fill_lb(void *data)
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{
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struct lb_serial serial;
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serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
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serial.baseaddr = CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
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serial.baud = default_baudrate();
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serial.regwidth = 1 << UART_SHIFT;
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lb_add_serial(&serial, data);
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lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
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}
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#endif
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