270 lines
8.5 KiB
C
270 lines
8.5 KiB
C
#ifndef DEVICE_H
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#define DEVICE_H
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/*
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* NOTICE: Header is ROMCC tentative.
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* This header is incompatible with ROMCC and its inclusion leads to 'odd'
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* build failures.
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*/
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#if !defined(__ROMCC__)
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#include <stdint.h>
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#include <stddef.h>
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#include <rules.h>
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#include <device/resource.h>
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#include <device/path.h>
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struct device;
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#ifndef __SIMPLE_DEVICE__
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typedef struct device * device_t;
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struct pci_operations;
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struct pci_bus_operations;
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struct smbus_bus_operations;
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struct pnp_mode_ops;
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/* Chip operations */
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struct chip_operations {
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void (*enable_dev)(struct device *dev);
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void (*init)(void *chip_info);
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void (*final)(void *chip_info);
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unsigned int initialized : 1;
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unsigned int finalized : 1;
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const char *name;
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};
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#define CHIP_NAME(X) .name = X,
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struct bus;
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struct smbios_type11;
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struct acpi_rsdp;
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struct device_operations {
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void (*read_resources)(device_t dev);
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void (*set_resources)(device_t dev);
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void (*enable_resources)(device_t dev);
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void (*init)(device_t dev);
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void (*final)(device_t dev);
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unsigned int (*scan_bus)(device_t bus, unsigned int _max);
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void (*enable)(device_t dev);
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void (*disable)(device_t dev);
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void (*set_link)(device_t dev, unsigned int link);
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void (*reset_bus)(struct bus *bus);
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#if CONFIG_GENERATE_SMBIOS_TABLES
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int (*get_smbios_data)(device_t dev, int *handle, unsigned long *current);
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void (*get_smbios_strings)(device_t dev, struct smbios_type11 *t);
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#endif
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#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) && IS_ENABLED(CONFIG_PER_DEVICE_ACPI_TABLES)
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unsigned long (*write_acpi_tables)(unsigned long start, struct acpi_rsdp *rsdp);
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void (*acpi_fill_ssdt_generator)(void);
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void (*acpi_inject_dsdt_generator)(void);
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#endif
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const struct pci_operations *ops_pci;
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const struct smbus_bus_operations *ops_smbus_bus;
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const struct pci_bus_operations * (*ops_pci_bus)(device_t dev);
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const struct pnp_mode_ops *ops_pnp_mode;
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};
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/**
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* Standard device operations function pointers shims.
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*/
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static inline void device_noop(struct device *dev) {}
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#define DEVICE_NOOP device_noop
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#endif /* ! __SIMPLE_DEVICE__ */
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struct bus {
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ROMSTAGE_CONST struct device * dev; /* This bridge device */
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ROMSTAGE_CONST struct device * children; /* devices behind this bridge */
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ROMSTAGE_CONST struct bus *next; /* The next bridge on this device */
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unsigned bridge_ctrl; /* Bridge control register */
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unsigned char link_num; /* The index of this link */
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uint16_t secondary; /* secondary bus number */
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uint16_t subordinate; /* max subordinate bus number */
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unsigned char cap; /* PCi capability offset */
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unsigned reset_needed : 1;
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unsigned disable_relaxed_ordering : 1;
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};
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/*
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* There is one device structure for each slot-number/function-number
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* combination:
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*/
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struct pci_irq_info {
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unsigned int ioapic_irq_pin;
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unsigned int ioapic_src_pin;
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unsigned int ioapic_dst_id;
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unsigned int ioapic_flags;
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};
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struct device {
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ROMSTAGE_CONST struct bus * bus; /* bus this device is on, for bridge
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* devices, it is the up stream bus */
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ROMSTAGE_CONST struct device * sibling; /* next device on this bus */
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ROMSTAGE_CONST struct device * next; /* chain of all devices */
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struct device_path path;
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unsigned vendor;
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unsigned device;
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u16 subsystem_vendor;
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u16 subsystem_device;
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unsigned int class; /* 3 bytes: (base, sub, prog-if) */
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unsigned int hdr_type; /* PCI header type */
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unsigned int enabled : 1; /* set if we should enable the device */
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unsigned int initialized : 1; /* set if we have initialized the device */
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unsigned int on_mainboard : 1;
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struct pci_irq_info pci_irq_info[4];
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u8 command;
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/* Base registers for this device. I/O, MEM and Expansion ROM */
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ROMSTAGE_CONST struct resource *resource_list;
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/* links are (downstream) buses attached to the device, usually a leaf
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* device with no children has 0 buses attached and a bridge has 1 bus
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*/
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ROMSTAGE_CONST struct bus *link_list;
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struct device_operations *ops;
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#ifndef __PRE_RAM__
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struct chip_operations *chip_ops;
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const char *name;
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#endif
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ROMSTAGE_CONST void *chip_info;
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};
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/**
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* This is the root of the device tree. The device tree is defined in the
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* static.c file and is generated by the config tool at compile time.
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*/
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extern ROMSTAGE_CONST struct device dev_root;
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#ifndef __SIMPLE_DEVICE__
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extern struct device *all_devices; /* list of all devices */
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extern struct resource *free_resources;
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extern struct bus *free_links;
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extern const char mainboard_name[];
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#if CONFIG_GFXUMA
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/* IGD UMA memory */
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extern uint64_t uma_memory_base;
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extern uint64_t uma_memory_size;
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#endif
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/* Generic device interface functions */
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device_t alloc_dev(struct bus *parent, struct device_path *path);
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void dev_initialize_chips(void);
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void dev_enumerate(void);
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void dev_configure(void);
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void dev_enable(void);
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void dev_initialize(void);
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void dev_optimize(void);
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void dev_finalize(void);
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void dev_finalize_chips(void);
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/* Generic device helper functions */
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int reset_bus(struct bus *bus);
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unsigned int scan_bus(struct device *bus, unsigned int _max);
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void assign_resources(struct bus *bus);
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void enumerate_static_device(void);
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void enumerate_static_devices(void);
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const char *dev_name(device_t dev);
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const char *dev_path(device_t dev);
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u32 dev_path_encode(device_t dev);
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const char *bus_path(struct bus *bus);
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void dev_set_enabled(device_t dev, int enable);
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void disable_children(struct bus *bus);
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/* Option ROM helper functions */
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void run_bios(struct device *dev, unsigned long addr);
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/* Helper functions */
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device_t find_dev_path(struct bus *parent, struct device_path *path);
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device_t alloc_find_dev(struct bus *parent, struct device_path *path);
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device_t dev_find_device (u16 vendor, u16 device, device_t from);
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device_t dev_find_class (unsigned int class, device_t from);
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device_t dev_find_slot (unsigned int bus, unsigned int devfn);
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device_t dev_find_slot_on_smbus (unsigned int bus, unsigned int addr);
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device_t dev_find_slot_pnp(u16 port, u16 device);
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device_t dev_find_lapic(unsigned apic_id);
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int dev_count_cpu(void);
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void remap_bsp_lapic(struct bus *cpu_bus);
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device_t add_cpu_device(struct bus *cpu_bus, unsigned apic_id, int enabled);
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void set_cpu_topology(device_t cpu, unsigned node, unsigned package, unsigned core, unsigned thread);
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#define amd_cpu_topology(cpu, node, core) \
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set_cpu_topology(cpu, node, 0, core, 0)
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#define intel_cpu_topology(cpu, package, core, thread) \
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set_cpu_topology(cpu, 0, package, core, thread)
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/* Debug functions */
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void print_resource_tree(struct device * root, int debug_level,
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const char *msg);
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void show_devs_tree(struct device *dev, int debug_level, int depth, int linknum);
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void show_devs_subtree(struct device *root, int debug_level, const char *msg);
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void show_all_devs(int debug_level, const char *msg);
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void show_all_devs_tree(int debug_level, const char *msg);
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void show_one_resource(int debug_level, struct device *dev,
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struct resource *resource, const char *comment);
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void show_all_devs_resources(int debug_level, const char* msg);
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/* Rounding for boundaries.
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* Due to some chip bugs, go ahead and round IO to 16
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*/
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#define DEVICE_IO_ALIGN 16
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#define DEVICE_MEM_ALIGN 4096
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extern struct device_operations default_dev_ops_root;
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void pci_domain_read_resources(struct device *dev);
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unsigned int pci_domain_scan_bus(struct device *dev, unsigned int _max);
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unsigned int scan_static_bus(device_t bus, unsigned int _max);
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void fixed_mem_resource(device_t dev, unsigned long index,
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unsigned long basek, unsigned long sizek, unsigned long type);
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/* It is the caller's responsibility to adjust regions such that ram_resource()
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* and mmio_resource() do not overlap.
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*/
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#define ram_resource(dev, idx, basek, sizek) \
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fixed_mem_resource(dev, idx, basek, sizek, IORESOURCE_CACHEABLE)
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#define reserved_ram_resource(dev, idx, basek, sizek) \
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fixed_mem_resource(dev, idx, basek, sizek, IORESOURCE_CACHEABLE | IORESOURCE_RESERVE)
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#define bad_ram_resource(dev, idx, basek, sizek) \
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reserved_ram_resource((dev), (idx), (basek), (sizek))
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#define uma_resource(dev, idx, basek, sizek) \
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fixed_mem_resource(dev, idx, basek, sizek, IORESOURCE_RESERVE)
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#define mmio_resource(dev, idx, basek, sizek) \
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fixed_mem_resource(dev, idx, basek, sizek, IORESOURCE_RESERVE)
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void tolm_test(void *gp, struct device *dev, struct resource *new);
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u32 find_pci_tolm(struct bus *bus);
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#else /* vv __SIMPLE_DEVICE__ vv */
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ROMSTAGE_CONST struct device * dev_find_slot (unsigned int bus,
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unsigned int devfn);
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ROMSTAGE_CONST struct device *dev_find_next_pci_device(
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ROMSTAGE_CONST struct device *previous_dev);
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ROMSTAGE_CONST struct device * dev_find_slot_on_smbus (unsigned int bus,
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unsigned int addr);
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#endif
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#endif /* !defined(__ROMCC__) */
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#endif /* DEVICE_H */
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