330 lines
11 KiB
Go
330 lines
11 KiB
Go
package apl
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import "fmt"
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import "strconv"
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// Local packages
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import "../common"
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import "../../config"
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import "../../fields"
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const (
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PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc
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PAD_CFG_DW1_RO_FIELDS = 0xfffc00ff
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)
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const (
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PAD_CFG_DW0 = common.PAD_CFG_DW0
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PAD_CFG_DW1 = common.PAD_CFG_DW1
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MAX_DW_NUM = common.MAX_DW_NUM
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)
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const (
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PULL_NONE = 0x0 // 0 000: none
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PULL_DN_5K = 0x2 // 0 010: 5k wpd (Only available on SMBus GPIOs)
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PULL_DN_20K = 0x4 // 0 100: 20k wpd
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// PULL_NONE = 0x8 // 1 000: none
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PULL_UP_1K = 0x9 // 1 001: 1k wpu (Only available on I2C GPIOs)
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PULL_UP_2K = 0xb // 1 011: 2k wpu (Only available on I2C GPIOs)
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PULL_UP_20K = 0xc // 1 100: 20k wpu
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PULL_UP_667 = 0xd // 1 101: 1k & 2k wpu (Only available on I2C GPIOs)
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PULL_NATIVE = 0xf // 1 111: (optional) Native controller selected by Pad Mode
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)
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type PlatformSpecific struct {}
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// RemmapRstSrc - remmap Pad Reset Source Config
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// remmap is not required because it is the same as common.
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func (PlatformSpecific) RemmapRstSrc() {}
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// Adds the PADRSTCFG parameter from DW0 to the macro as a new argument
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// return: macro
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func (PlatformSpecific) Rstsrc() {
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macro := common.GetMacro()
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dw0 := macro.Register(PAD_CFG_DW0)
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// See src/soc/intel/apollolake/gpio_apl.c:
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// static const struct reset_mapping rst_map[] = {
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// { .logical = PAD_CFG0_LOGICAL_RESET_PWROK, .chipset = 0U << 30 },
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// { .logical = PAD_CFG0_LOGICAL_RESET_DEEP, .chipset = 1U << 30 },
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// { .logical = PAD_CFG0_LOGICAL_RESET_PLTRST, .chipset = 2U << 30 },
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// };
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var resetsrc = map[uint8]string{
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0: "PWROK",
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1: "DEEP",
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2: "PLTRST",
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}
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str, valid := resetsrc[dw0.GetResetConfig()]
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if !valid {
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// 3h = Reserved (implement as setting 0h)
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dw0.CntrMaskFieldsClear(common.PadRstCfgMask)
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str = "PWROK"
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}
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macro.Separator().Add(str)
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}
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// Adds The Pad Termination (TERM) parameter from DW1 to the macro as a new argument
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// return: macro
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func (PlatformSpecific) Pull() {
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macro := common.GetMacro()
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dw1 := macro.Register(PAD_CFG_DW1)
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var pull = map[uint8]string{
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PULL_NONE: "NONE",
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PULL_DN_5K: "DN_5K",
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PULL_DN_20K: "DN_20K",
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PULL_UP_1K: "UP_1K",
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PULL_UP_2K: "UP_2K",
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PULL_UP_20K: "UP_20K",
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PULL_UP_667: "UP_667",
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PULL_NATIVE: "NATIVE",
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}
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terminationFieldValue := dw1.GetTermination()
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str, valid := pull[terminationFieldValue]
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if !valid {
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str = strconv.Itoa(int(terminationFieldValue))
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fmt.Println("Error", macro.PadIdGet(), " invalid TERM value = ", str)
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}
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macro.Separator().Add(str)
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}
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// Generate macro to cause peripheral IRQ when configured in GPIO input mode
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func ioApicRoute() bool {
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macro := common.GetMacro()
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dw0 := macro.Register(PAD_CFG_DW0)
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dw1 := macro.Register(PAD_CFG_DW1)
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if dw0.GetGPIOInputRouteIOxAPIC() == 0 {
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return false
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}
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macro.Add("_APIC")
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if dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0 {
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// e.g. H1_PCH_INT_ODL
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// PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),
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macro.Add("_IOS(").Id().Pull().Rstsrc().Trig().Invert().IOSstate().IOTerm()
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} else {
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// PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv)
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macro.Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
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}
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macro.Add("),")
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return true
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}
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// Generate macro to cause NMI when configured in GPIO input mode
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func nmiRoute() bool {
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macro := common.GetMacro()
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if macro.Register(PAD_CFG_DW0).GetGPIOInputRouteNMI() == 0 {
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return false
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}
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// e.g. PAD_CFG_GPI_NMI(GPIO_24, UP_20K, DEEP, LEVEL, INVERT),
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macro.Add("_NMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
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return true
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}
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// Generate macro to cause SCI when configured in GPIO input mode
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func sciRoute() bool {
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macro := common.GetMacro()
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dw0 := macro.Register(PAD_CFG_DW0)
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dw1 := macro.Register(PAD_CFG_DW0)
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if dw0.GetGPIOInputRouteSCI() == 0 {
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return false
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}
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if dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0 {
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// PAD_CFG_GPI_SCI_IOS(GPIO_141, NONE, DEEP, EDGE_SINGLE, INVERT, IGNORE, DISPUPD),
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macro.Add("_SCI_IOS")
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macro.Add("(").Id().Pull().Rstsrc().Trig().Invert().IOSstate().IOTerm()
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} else if dw0.GetRXLevelEdgeConfiguration() & 0x1 != 0 {
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// e.g. PAD_CFG_GPI_ACPI_SCI(GPP_G2, NONE, DEEP, YES),
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macro.Add("_ACPI_SCI").Add("(").Id().Pull().Rstsrc().Invert()
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} else {
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// e.g. PAD_CFG_GPI_SCI(GPP_B18, UP_20K, PLTRST, LEVEL, INVERT),
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macro.Add("_SCI").Add("(").Id().Pull().Rstsrc().Trig().Invert()
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}
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macro.Add("),")
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return true
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}
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// Generate macro to cause SMI when configured in GPIO input mode
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func smiRoute() bool {
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macro := common.GetMacro()
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dw0 := macro.Register(PAD_CFG_DW0)
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dw1 := macro.Register(PAD_CFG_DW1)
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if dw0.GetGPIOInputRouteSMI() == 0 {
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return false
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}
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if dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0 {
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// PAD_CFG_GPI_SMI_IOS(GPIO_41, UP_20K, DEEP, EDGE_SINGLE, NONE, IGNORE, SAME),
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macro.Add("_SMI_IOS")
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macro.Add("(").Id().Pull().Rstsrc().Trig().Invert().IOSstate().IOTerm()
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} else if dw0.GetRXLevelEdgeConfiguration() & 0x1 != 0 {
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// e.g. PAD_CFG_GPI_ACPI_SMI(GPP_I3, NONE, DEEP, YES),
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macro.Add("_ACPI_SMI").Add("(").Id().Pull().Rstsrc().Invert()
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} else {
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// e.g. PAD_CFG_GPI_SMI(GPP_E3, NONE, PLTRST, EDGE_SINGLE, NONE),
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macro.Add("_SMI").Add("(").Id().Pull().Rstsrc().Trig().Invert()
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}
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macro.Add("),")
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return true
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}
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// Generate macro for GPI port
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func (PlatformSpecific) GpiMacroAdd() {
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macro := common.GetMacro()
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var ids []string
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macro.Set("PAD_CFG_GPI")
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for routeid, isRoute := range map[string]func() (bool) {
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"IOAPIC": ioApicRoute,
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"SCI": sciRoute,
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"SMI": smiRoute,
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"NMI": nmiRoute,
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} {
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if isRoute() {
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ids = append(ids, routeid)
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}
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}
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switch argc := len(ids); argc {
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case 0:
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dw1 := macro.Register(PAD_CFG_DW1)
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isIOStandbyStateUsed := dw1.GetIOStandbyState() != 0
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isIOStandbyTerminationUsed := dw1.GetIOStandbyTermination() != 0
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if isIOStandbyStateUsed && !isIOStandbyTerminationUsed {
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macro.Add("_TRIG_IOSSTATE_OWN(")
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// PAD_CFG_GPI_TRIG_IOSSTATE_OWN(pad, pull, rst, trig, iosstate, own)
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macro.Id().Pull().Rstsrc().Trig().IOSstate().Own().Add("),")
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} else if isIOStandbyTerminationUsed {
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macro.Add("_TRIG_IOS_OWN(")
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// PAD_CFG_GPI_TRIG_IOS_OWN(pad, pull, rst, trig, iosstate, iosterm, own)
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macro.Id().Pull().Rstsrc().Trig().IOSstate().IOTerm().Own().Add("),")
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} else {
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// PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own)
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macro.Add("_TRIG_OWN(").Id().Pull().Rstsrc().Trig().Own().Add("),")
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}
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case 1:
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// GPI with IRQ route
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if config.AreFieldsIgnored() {
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macro.SetPadOwnership(common.PAD_OWN_ACPI)
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}
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case 2:
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// PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, route1, route2)
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macro.Set("PAD_CFG_GPI_DUAL_ROUTE(").Id().Pull().Rstsrc().Trig().Invert()
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macro.Add(", " + ids[0] + ", " + ids[1] + "),")
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if config.AreFieldsIgnored() {
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macro.SetPadOwnership(common.PAD_OWN_ACPI)
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}
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default:
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// Clear the control mask so that the check fails and "Advanced" macro is
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// generated
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macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
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}
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}
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// Adds PAD_CFG_GPO macro with arguments
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func (PlatformSpecific) GpoMacroAdd() {
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macro := common.GetMacro()
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dw0 := macro.Register(PAD_CFG_DW0)
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dw1 := macro.Register(PAD_CFG_DW1)
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term := dw1.GetTermination()
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macro.Set("PAD_CFG")
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if dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0 {
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// PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_91, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD),
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// PAD_CFG_GPO_IOSSTATE_IOSTERM(pad, val, rst, pull, iosstate, ioterm)
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macro.Add("_GPO_IOSSTATE_IOSTERM(").Id().Val().Rstsrc().Pull().IOSstate().IOTerm()
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} else {
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if term != 0 {
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// e.g. PAD_CFG_TERM_GPO(GPP_B23, 1, DN_20K, DEEP),
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// PAD_CFG_TERM_GPO(pad, val, pull, rst)
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macro.Add("_TERM")
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}
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macro.Add("_GPO(").Id().Val()
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if term != 0 {
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macro.Pull()
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}
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macro.Rstsrc()
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}
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macro.Add("),")
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if dw0.GetRXLevelEdgeConfiguration() != common.TRIG_OFF {
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// ignore if trig = OFF is not set
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dw0.CntrMaskFieldsClear(common.RxLevelEdgeConfigurationMask)
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}
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}
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// Adds PAD_CFG_NF macro with arguments
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func (PlatformSpecific) NativeFunctionMacroAdd() {
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macro := common.GetMacro()
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dw1 := macro.Register(PAD_CFG_DW1)
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isIOStandbyStateUsed := dw1.GetIOStandbyState() != 0
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isIOStandbyTerminationUsed := dw1.GetIOStandbyTermination() != 0
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macro.Set("PAD_CFG_NF")
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if !isIOStandbyTerminationUsed && isIOStandbyStateUsed {
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if dw1.GetIOStandbyState() == common.StandbyIgnore {
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// PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S0_B, NONE, DEEP, NF1),
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macro.Add("_IOSTANDBY_IGNORE(").Id().Pull().Rstsrc().Padfn()
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} else {
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// PAD_CFG_NF_IOSSTATE(GPIO_22, UP_20K, DEEP, NF2, TxDRxE),
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macro.Add("_IOSSTATE(").Id().Pull().Rstsrc().Padfn().IOSstate()
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}
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} else if isIOStandbyTerminationUsed {
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// PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_103, NATIVE, DEEP, NF1, MASK, SAME),
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macro.Add("_IOSSTATE_IOSTERM(").Id().Pull().Rstsrc().Padfn().IOSstate().IOTerm()
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} else {
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// e.g. PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1)
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macro.Add("(").Id().Pull().Rstsrc().Padfn()
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}
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macro.Add("),")
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if dw0 := macro.Register(PAD_CFG_DW0); dw0.GetGPIORxTxDisableStatus() != 0 {
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// Since the bufbis parameter will be ignored for NF, we should clear
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// the corresponding bits in the control mask.
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dw0.CntrMaskFieldsClear(common.RxTxBufDisableMask)
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}
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}
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// Adds PAD_NC macro
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func (PlatformSpecific) NoConnMacroAdd() {
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macro := common.GetMacro()
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dw1 := macro.Register(PAD_CFG_DW1)
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if dw1.GetIOStandbyState() == common.TxDRxE {
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dw0 := macro.Register(PAD_CFG_DW0)
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// See comments in sunrise/macro.go : NoConnMacroAdd()
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if dw0.GetRXLevelEdgeConfiguration() != common.TRIG_OFF {
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dw0.CntrMaskFieldsClear(common.RxLevelEdgeConfigurationMask)
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}
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if dw0.GetResetConfig() != 1 { // 1 = RST_DEEP
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dw0.CntrMaskFieldsClear(common.PadRstCfgMask)
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}
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// PAD_NC(OSC_CLK_OUT_1, DN_20K)
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macro.Set("PAD_NC").Add("(").Id().Pull().Add("),")
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return
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}
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// PAD_CFG_GPIO_HI_Z(GPIO_81, UP_20K, DEEP, HIZCRx0, DISPUPD),
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macro.Set("PAD_CFG_GPIO_")
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if macro.IsOwnershipDriver() {
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// PAD_CFG_GPIO_DRIVER_HI_Z(GPIO_55, UP_20K, DEEP, HIZCRx1, ENPU),
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macro.Add("DRIVER_")
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}
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macro.Add("HI_Z(").Id().Pull().Rstsrc().IOSstate().IOTerm().Add("),")
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}
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// GenMacro - generate pad macro
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// dw0 : DW0 config register value
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// dw1 : DW1 config register value
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// return: string of macro
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// error
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func (PlatformSpecific) GenMacro(id string, dw0 uint32, dw1 uint32, ownership uint8) string {
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macro := common.GetInstanceMacro(PlatformSpecific{}, fields.InterfaceGet())
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// use platform-specific interface in Macro struct
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macro.PadIdSet(id).SetPadOwnership(ownership)
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macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
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macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
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macro.Register(PAD_CFG_DW0).ValueSet(dw0).ReadOnlyFieldsSet(PAD_CFG_DW0_RO_FIELDS)
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macro.Register(PAD_CFG_DW1).ValueSet(dw1).ReadOnlyFieldsSet(PAD_CFG_DW1_RO_FIELDS)
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return macro.Generate()
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}
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