babbe08e7c
Signed-off-by: Po Xu <jg_poxu@mediatek.corp-partner.google.com> Change-Id: Ica1b1c80a851075599442298bb6675caf5c72f57 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52598 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
92 lines
1.8 KiB
C
92 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <device/mmio.h>
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#include <gpio.h>
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static void *gpio_find_reg_addr(gpio_t gpio)
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{
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void *reg_addr;
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switch (gpio.base & 0x0f) {
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case 0:
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reg_addr = (void *)IOCFG_BL_BASE;
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break;
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case 1:
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reg_addr = (void *)IOCFG_BM_BASE;
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break;
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case 2:
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reg_addr = (void *)IOCFG_BR_BASE;
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break;
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case 3:
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reg_addr = (void *)IOCFG_LM_BASE;
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break;
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case 4:
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reg_addr = (void *)IOCFG_RB_BASE;
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break;
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case 5:
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reg_addr = (void *)IOCFG_TL_BASE;
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break;
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default:
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reg_addr = NULL;
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break;
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}
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return reg_addr;
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}
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static void gpio_set_spec_pull_pupd(gpio_t gpio, enum pull_enable enable,
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enum pull_select select)
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{
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void *reg1;
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void *reg2;
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int bit = gpio.bit;
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reg1 = gpio_find_reg_addr(gpio) + gpio.offset;
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reg2 = reg1 + (gpio.base & 0xf0);
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if (enable == GPIO_PULL_ENABLE) {
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if (select == GPIO_PULL_DOWN)
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setbits32(reg1, 1 << bit);
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else
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clrbits32(reg1, 1 << bit);
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}
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if (enable == GPIO_PULL_ENABLE) {
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setbits32(reg2, 1 << bit);
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} else {
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clrbits32(reg2, 1 << bit);
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clrbits32(reg2 + 0x010, 1 << bit);
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}
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}
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static void gpio_set_pull_pu_pd(gpio_t gpio, enum pull_enable enable,
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enum pull_select select)
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{
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void *reg1;
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void *reg2;
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int bit = gpio.bit;
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reg1 = gpio_find_reg_addr(gpio) + gpio.offset;
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reg2 = reg1 - (gpio.base & 0xf0);
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if (enable == GPIO_PULL_ENABLE) {
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if (select == GPIO_PULL_DOWN) {
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clrbits32(reg1, 1 << bit);
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setbits32(reg2, 1 << bit);
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} else {
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clrbits32(reg2, 1 << bit);
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setbits32(reg1, 1 << bit);
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}
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} else {
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clrbits32(reg1, 1 << bit);
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clrbits32(reg2, 1 << bit);
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}
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}
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void gpio_set_pull(gpio_t gpio, enum pull_enable enable,
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enum pull_select select)
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{
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if (gpio.flag)
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gpio_set_spec_pull_pupd(gpio, enable, select);
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else
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gpio_set_pull_pu_pd(gpio, enable, select);
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}
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