0685322f4a
Given a specification of bitfields defined e.g. as follows:
specfile:
{
"field1" : 8,
"field2" : 4,
"field3" : 4
}
and a set of values for setting defaults:
setterfile:
{
"field1" = 0xff,
"field2" = 0xf,
"field3" = 0xf
}
You can generate a binary packed blob as follows:
./blobtool specfile setterfile binaryoutput
binaryoutput: ff ff
The reverse is also possible, i.e. you can regenerate the setter:
./blobtool -d specfile binaryoutput setterorig
setterorig:
# AUTOGENERATED SETTER BY BLOBTOOL
{
"field1" = 0xff,
"field2" = 0xf,
"field3" = 0xf
}
This tool comes with spec/set files for X200 flash descriptor
and ICH9M GbE region, and can be extended or used to decompile
other data blobs with known specs.
Change-Id: I744d6b421003feb4fc460133603af7e6bd80b1d6
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/17445
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Martin Roth <martinroth@google.com>
88 lines
2.1 KiB
Text
88 lines
2.1 KiB
Text
#
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# Copyright (C) 2017 Damien Zammit <damien@zamaudio.com>
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#
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# This program is free software: you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation, either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# GbE values for ICH9M
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{
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# Hardcoded chipset values
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"reserved04" = 0xffff,
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"version05" = 0x1083,
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"reserved06" = 0xffff,
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"reserved07" = 0xffff,
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"pbalow" = 0xffff,
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"pbahigh" = 0xffff,
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"pci_loadvid" = 1,
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"pci_loadssid" = 1,
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"pci_pmen" = 1,
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"pci_auxpwr" = 1,
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"pci_reserved4" = 1,
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"sh_phy_enpwrdown" = 1,
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"sh_reserved1" = 0x5,
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"sh_reserved3" = 1,
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"sh_sign" = 0x2,
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"cw1_extcfgptr" = 0x020,
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"cw1_oemload" = 1,
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"cw1_reserved1" = 1,
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"cw2_extphylen" = 0x05,
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"l1_reserved2" = 1,
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"l1_reserved4" = 1,
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"l1_lplu_non_d0a" = 1,
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"l1_gbedis_non_d0a" = 1,
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"reserved19" = 0x2b40,
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"reserved1a" = 0x0043,
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"reserved1c" = 0x10f5,
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"reserved1d" = 0xbaad,
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"_82567lm" = 0x10f5,
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"_82567lf" = 0x10bf,
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"reserved20" = 0xbaad,
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"_82567v" = 0x10cb,
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"reserved22_0" = 0xbaad,
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"reserved22_1" = 0xbaad,
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# Hardcoded PXE setup (disabled)
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"pxe30_defbootsel" = 0x3,
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"pxe30_ctrlsprompt" = 0x3,
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"pxe30_pxeabsent" = 1,
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"pxe31_disablemenu" = 1,
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"pxe31_disabletitle" = 1,
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"pxe31_signature" = 1,
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"pxe32_buildnum" = 0x18,
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"pxe32_minorversion" = 0x3,
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"pxe32_majorversion" = 0x1,
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"pxe33_basecodeabsent" = 1,
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"pxe33_undipresent" = 1,
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"pxe33_reserved1" = 1,
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"pxe33_signature" = 1,
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"pxe_padding"[11] = 0xffff,
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# GbE power settings
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"lanpwr_d3pwr" = 1,
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"lanpwr_d0pwr" = 13,
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# GbE LED modes
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"l1_led1mode" = 0xb,
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"l1_led1blinks" = 1,
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"l02_led0mode" = 0x2,
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"l02_led2mode" = 0x1,
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# Padding 0xf80 bytes
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"padding"[0xf80] = 0xff,
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# TODO: make command line switch for these
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# Configurable PCI IDs
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"ssdid" = 0x20ee,
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"ssvid" = 0x17aa,
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"did" = 0x10f5,
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"vid" = 0x8086
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}
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