a73b93157f
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
41 lines
1.2 KiB
C
41 lines
1.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef CPU_AMD_FAM14_H
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#define CPU_AMD_FAM14_H
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#include <cpu/x86/msr.h>
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#define HWCR_MSR 0xC0010015
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#define NB_CFG_MSR 0xC001001f
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#define LS_CFG_MSR 0xC0011020
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#define IC_CFG_MSR 0xC0011021
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#define DC_CFG_MSR 0xC0011022
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#define BU_CFG_MSR 0xC0011023
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#define BU_CFG2_MSR 0xC001102A
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#define CPU_ID_FEATURES_MSR 0xC0011004
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#define CPU_ID_EXT_FEATURES_MSR 0xC0011005
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#if defined(__PRE_RAM__)
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void wait_all_core0_started(void);
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void wait_all_other_cores_started(u32 bsp_apicid);
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void wait_all_aps_started(u32 bsp_apicid);
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void allow_all_aps_stop(u32 bsp_apicid);
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#endif
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void get_bus_conf(void);
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u32 get_initial_apicid(void);
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#endif /* CPU_AMD_FAM14_H */
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