coreboot-kgpe-d16/payloads/libpayload/include/x86/arch
Furquan Shaikh ba87e6cc94 libpayload: Add support for memory barriers
Add support for memory barriers in arch {arm,arm64,x86}. This is required to
force strict CPU ordering. Definitions are based on FREEBSD atomic.h
definitions.

BUG=chrome-os-partner:31533
BRANCH=None
TEST=Memory barriers tested with ehci driver on arm64

Change-Id: I50060b0f33a6bd6cb95e829df079df379b2ff2a5
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 937d66cdab92a8521ede8307f5af8f5c20d3e552
Original-Change-Id: Ie51e3452f7a254b24111000da5dbe8714ac22223
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/213916
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8731
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-19 23:24:16 +01:00
..
barrier.h libpayload: Add support for memory barriers 2015-03-19 23:24:16 +01:00
cache.h arm: Redesign, clarify and clean up cache related code 2014-11-10 21:34:49 +01:00
exception.h libpayload: Rework exception hook interface 2015-01-09 07:05:15 +01:00
io.h libpayload: Expand setbits_le32() and fix readl() const-ness 2015-01-12 05:56:01 +01:00
msr.h
rdtsc.h
types.h libpayload: Don't sneak in compiler includes 2013-04-18 02:50:28 +02:00
virtual.h