coreboot-kgpe-d16/src
Johnny Lin c05aa26a1f xeon_sp/{cpx,skx}: Add config IFD_CHIPSET 'lbg'
This is needed for ifdtool -p to detect CPX and SKX Lewisburg PCH as IFDv2.

Change-Id: I21df9f700aedf131a38a776e76722bf918e6af84
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55746
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-28 04:12:18 +00:00
..
acpi ACPI: Refactor use of global and device NVS 2021-06-14 19:45:56 +00:00
arch arch/x86/bootblock.ld: Align the bottom of the bootblock to 64 bytes 2021-06-24 11:22:54 +00:00
commonlib helpers: Introduce retry macro 2021-06-26 10:09:06 +00:00
console Asm code: Use NO_EARLY_BOOTBLOCK_POSTCODES to remove Asm port80s 2021-06-25 15:51:20 +00:00
cpu Asm code: Use NO_EARLY_BOOTBLOCK_POSTCODES to remove Asm port80s 2021-06-25 15:51:20 +00:00
device device: Add helper function devfn_disable() 2021-06-17 06:48:45 +00:00
drivers drivers/intel/mipi_camera: Change type for gpio_num to uint16_t 2021-06-21 05:34:58 +00:00
ec ec/google/wilco: Fix comment about enclosure type 2021-06-21 05:43:52 +00:00
include Asm code: Use NO_EARLY_BOOTBLOCK_POSTCODES to remove Asm port80s 2021-06-25 15:51:20 +00:00
lib nvs: Add Chrome OS NVS (CNVS) information to coreboot tables 2021-06-18 18:38:14 +00:00
mainboard mb/google/brya/variants/primus: init overridetree for Primus 2021-06-26 04:07:49 +00:00
northbridge nb/intel/haswell/pcie.c: Avoid needless death 2021-06-22 04:47:20 +00:00
security security/intel/cbnt: Remove fixed size requirement 2021-06-25 15:52:05 +00:00
soc xeon_sp/{cpx,skx}: Add config IFD_CHIPSET 'lbg' 2021-06-28 04:12:18 +00:00
southbridge security/intel: Add option to enable SMM flash access only 2021-06-21 08:11:11 +00:00
superio src: Retype option API to use unsigned integers 2021-05-06 14:48:15 +00:00
vendorcode vendorcode/intel/fsp: Remove deprecated header 2021-06-26 10:06:52 +00:00
Kconfig option: Allow mainboards to implement the API 2021-05-28 11:37:25 +00:00