f757bf8e76
Essentially a copy of veyron_jerry for now. BUG=chrome-os-partner:33269 TEST=build Change-Id: Ie2d115d57fe4b6359fa6bb16a2e85e88ec99e991 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 9ec25b9cf2985786e55f0b85c3849ccbd42bddd4 Original-Change-Id: Icc45c8f8bf9f6916ba7187dde277d15cc60df8a2 Original-Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/230961 Original-Commit-Id: 407b8b74a068220d8051dd0d85d9c4ec3ea14d51 Original-Change-Id: I546dbc41ccd191159e96b851424fcb37902a57ec Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/231691 Reviewed-on: http://review.coreboot.org/9554 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
41 lines
1.2 KiB
Makefile
41 lines
1.2 KiB
Makefile
##
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## This file is part of the coreboot project.
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##
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## Copyright 2014 Rockchip Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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bootblock-y += bootblock.c
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bootblock-y += boardid.c
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bootblock-y += chromeos.c
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bootblock-y += reset.c
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verstage-y += boardid.c
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verstage-y += chromeos.c
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verstage-y += reset.c
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romstage-y += boardid.c
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romstage-y += romstage.c
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romstage-y += sdram_configs.c
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romstage-y += reset.c
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ramstage-y += boardid.c
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ramstage-y += chromeos.c
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ramstage-y += mainboard.c
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ramstage-y += reset.c
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bootblock-y += memlayout.ld
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verstage-y += memlayout.ld
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romstage-y += memlayout.ld
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ramstage-y += memlayout.ld
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