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huang lin c16ba0aeaa rk3288: send correct EDID buffer size
decode_edid() parses the whole EDID buffer, regardless of whether there
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prevent EDID parser getting the wrong data.

BUG=chrome-os-partner:35053
TEST=Boot from jerry
BRANCH=veyron

Change-Id: I5951b670f129cf4765a5199cb58ac6abff5478a6
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 4d508647efc0a9d48b2a4b23c12a54b63af2813e
Original-Change-Id: I8cd8e09025520322461fe940b01e4af3995b5ecd
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/240643
Original-Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-on: http://review.coreboot.org/9645
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-15 16:48:24 +02:00
3rdparty@892a6976ba 3rdparty: move checkout marker forward 2015-04-14 01:09:51 +02:00
documentation documentation: define downstream data consumption rules 2015-04-07 00:20:13 +02:00
payloads Brain: Initial mainboard import 2015-04-15 16:42:18 +02:00
src rk3288: send correct EDID buffer size 2015-04-15 16:48:24 +02:00
util timestamps: You can never have enough of them! 2015-04-14 09:03:40 +02:00
.gitignore .gitignore: add the doxygen directory. 2014-12-14 23:30:45 +01:00
.gitmodules nvidia/cbootimage: avoid upstream's build system 2014-10-02 10:26:58 +02:00
.gitreview add .gitreview 2012-11-01 23:13:39 +01:00
COPYING update license template. 2006-08-12 22:03:36 +00:00
Makefile build system: run linker scripts through the preprocessor 2015-04-06 19:14:00 +02:00
Makefile.inc CBFS: Correct ROM_SIZE for ARM boards, use CBFS_SIZE for cbfstool 2015-04-14 09:01:23 +02:00
README Update README with newer version of the text from the web page 2011-06-15 10:16:33 +02:00
toolchain.inc mips: mips, not mipsel 2015-03-29 22:38:57 +02:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * gcc / g++
 * make

Optional:

 * doxygen (for generating/viewing documentation)
 * iasl (for targets with ACPI support)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.