coreboot-kgpe-d16/src/soc/rockchip/rk3288/chip.h
Julius Werner 19420c137c veyron: Fix file permissions
Some files for the veyron project were checked in with execute
permissions where it doesn't make sense. Fix.

BUG=chrome-os-partner:30167
TEST=None

Change-Id: I2a96816d4fd0af3949b0adaf5208fd2862835b5b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d7a408ff273d848b60aaad4f8b27103318e56111
Original-Change-Id: Ia3788abf3755baf028518efb975701cf6cb37e46
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/217673
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/8868
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2015-03-24 15:25:35 +01:00

47 lines
1.2 KiB
C

/*
* This file is part of the coreboot project.
*
* Copyright 2014 Rockchip Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef __SOC_ROCKCHIP_RK3288_CHIP_H__
#define __SOC_ROCKCHIP_RK3288_CHIP_H__
struct soc_rockchip_rk3288_config {
int screen_type;
int lvds_format;
int out_face;
int clock_frequency;
int hactive;
int vactive;
int hback_porch;
int hfront_porch;
int vback_porch;
int vfront_porch;
int hsync_len;
int vsync_len;
int hsync_active;
int vsync_active;
int de_active;
int pixelclk_active;
int swap_rb;
int swap_rg;
int swap_gb;
int lcd_en_gpio;
int lcd_cs_gpio;
};
#endif /* __SOC_ROCKCHIP_RK3288_CHIP_H__ */