c20ff482a7
The default CBFS size configuration setting is incorrect in case of Qualcomm SOC targets, as the coreboot blob is much smaller than the actual bootprom. Note that this size also must match the board fmap defined in the appropriate depthcharge board directory. BUG=chromium:394068 TEST=manual . previously failing to boot coreboot image does not fail to load depthcharge anymore. Original-Change-Id: I1b178970b1deee05705490542e4a0c57500379dd Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/208146 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> (cherry picked from commit 01f3561fdee7b5547534e20d423fbbb1b490532c) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: If573bbc6254cf6786e75970eae3ad2b327a7ecfe Reviewed-on: http://review.coreboot.org/8640 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
9 lines
298 B
Text
9 lines
298 B
Text
source src/soc/qualcomm/ipq806x/Kconfig
|
|
|
|
config CBFS_SIZE
|
|
hex "Size of CBFS filesystem in ROM"
|
|
default ROM_SIZE
|
|
help
|
|
CBFS size needs to match the size of memory allocated to the
|
|
coreboot blob elsewhere in the system. Make sure this config option
|
|
is fine tuned in the board config file.
|