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Pratik Prajapati c29e57d88c util/cbmem: Add --rawdump <cbtable ID> and extend -l output
Changed following things,

(1) cbmem -l would give both ID and Name for coreboot table along with
START and LENGTH of each entry

e.g.
localhost ~ # cbmem -l
CBMEM table of contents:
    NAME          ID           START      LENGTH
<.....>
 3. TIME STAMP  54494d45  77ddd000   000002e0
 4. MRC DATA    4d524344  77ddb000   00001880
 5. ROMSTG STCK 90357ac4  77dd6000   00005000
 6. VBOOT WORK  78007343  77dd2000   00004000
 7. VBOOT       780074f0  77dd1000   00000c3c
 8. RAMSTAGE    9a357a9e  77d13000   000be000
 9. REFCODE     04efc0de  77c01000   00112000
10. ACPI GNVS   474e5653  77c00000   00001000
11. SMM BACKUP  07e9acee  77bf0000   00010000
<..etc..>

(2) With this patch, new command line arg "rawdump" or "-r" will be
added to cbmem

user can grab the ID with "cbmem -l" and execute "cbmem -r <ID>" to get
raw dump of cbtable for the <ID> in interest.

This change is needed to get MMA results data from cbtable. Coreboot
stores the MMA results in cbmem. Separate post processing scripts uses
cbmem utility to get the these data.

This feature in the cbmem tool can also help debugging some issues where
some specific ID of cbtable needs examination.

BRANCH=none
BUG=chrome-os-partner:43731
TEST=Build and Boot kunimitsu (FAB3). Cbmem -r and -l works as described.
Not tested on Glados

CQ-DEPEND=CL:299476,CL:299475,CL:299473,CL:299509,CL:299508,CL:299507,CL:*230478,CL:*230479

Change-Id: I70ba148113b4e918646b99997a9074300a9c7876
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f60c79d845d4d4afca480b6884c564a0d5e5caf8
Original-Change-Id: I1dde50856f0aa8d4cdd3ecf013bd58d37d76eb72
Original-Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com>
Original-Signed-off-by: Icarus Sparry <icarus.w.sparry@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/299474
Original-Commit-Ready: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Original-Tested-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: http://review.coreboot.org/12482
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-20 18:21:30 +01:00
3rdparty 3rdparty/vboot: update to current master 2015-10-28 22:28:16 +01:00
Documentation documentation: Update the document about building coreboot 2015-11-19 16:05:41 +01:00
payloads libpayload: PDCurses: Remove trailing whitespace 2015-11-20 16:27:36 +01:00
src intel: Add MMA feature in coreboot 2015-11-20 18:21:25 +01:00
util util/cbmem: Add --rawdump <cbtable ID> and extend -l output 2015-11-20 18:21:30 +01:00
.clang-format Provide coreboot coding style formalisation file for clang-format 2015-11-10 00:49:03 +01:00
.gitignore .gitignore: adapt to new buildgcc version 2015-09-28 20:05:14 +00:00
.gitmodules submodules: add arm-trusted-firmware third-party repository 2015-06-23 08:20:24 +02:00
.gitreview add .gitreview 2012-11-01 23:13:39 +01:00
COPYING update license template. 2006-08-12 22:03:36 +00:00
MAINTAINERS MAINTAINERS: Fix format for file entries (F:) 2015-10-22 20:20:48 +02:00
Makefile build system: tighten down .xcompile handling some more 2015-11-20 10:33:07 +01:00
Makefile.inc crossgcc: Update makefile builds 2015-11-19 16:50:00 +01:00
README README: improve description of compiler requirements 2015-07-30 05:11:33 +02:00
toolchain.inc rules.h: Add ENV_ macros to detect current architecture 2015-11-17 21:31:07 +01:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * make
 * gcc / g++
   Because Linux distribution compilers tend to use lots of patches. coreboot
   does lots of "unusual" things in its build system, some of which break due
   to those patches, sometimes by gcc aborting, sometimes - and that's worse -
   by generating broken object code.
   Two options: use our toolchain (eg. make crosstools-i386) or enable the
   ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this
   case).
 * iasl (for targets with ACPI support)

Optional:

 * doxygen (for generating/viewing documentation)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig' and 'make nconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.