384 lines
12 KiB
C
384 lines
12 KiB
C
#include <console/console.h>
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#include <device/path.h>
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#include <device/pci_ids.h>
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#include <cpu/cpu.h>
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#include <arch/smp/mpspec.h>
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#include <string.h>
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#include <arch/cpu.h>
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#include <cpu/x86/lapic.h>
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/* Initialize the specified "mc" struct with initial values. */
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void mptable_init(struct mp_config_table *mc, const char *productid,
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u32 lapic_addr)
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{
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/* Error out if 'product_id' length doesn't match exactly. */
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if (strlen(productid) != 12)
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die("ERROR: 'productid' must be 12 bytes long!");
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memset(mc, 0, sizeof(*mc));
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memcpy(mc->mpc_signature, MPC_SIGNATURE, 4);
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mc->mpc_length = sizeof(*mc); /* Initially just the header size. */
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mc->mpc_spec = 0x04; /* MultiProcessor specification 1.4 */
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mc->mpc_checksum = 0; /* Not yet computed. */
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memcpy(mc->mpc_oem, "COREBOOT", 8);
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memcpy(mc->mpc_productid, productid, 12);
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mc->mpc_oemptr = 0;
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mc->mpc_oemsize = 0;
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mc->mpc_entry_count = 0; /* No entries yet... */
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mc->mpc_lapic = lapic_addr;
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mc->mpe_length = 0;
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mc->mpe_checksum = 0;
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mc->reserved = 0;
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}
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unsigned char smp_compute_checksum(void *v, int len)
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{
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unsigned char *bytes;
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unsigned char checksum;
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int i;
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bytes = v;
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checksum = 0;
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for(i = 0; i < len; i++) {
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checksum -= bytes[i];
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}
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return checksum;
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}
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void *smp_write_floating_table(unsigned long addr)
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{
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/* 16 byte align the table address */
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addr = (addr + 0xf) & (~0xf);
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return smp_write_floating_table_physaddr(addr, addr + SMP_FLOATING_TABLE_LEN);
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}
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void *smp_write_floating_table_physaddr(unsigned long addr, unsigned long mpf_physptr)
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{
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struct intel_mp_floating *mf;
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void *v;
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v = (void *)addr;
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mf = v;
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mf->mpf_signature[0] = '_';
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mf->mpf_signature[1] = 'M';
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mf->mpf_signature[2] = 'P';
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mf->mpf_signature[3] = '_';
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mf->mpf_physptr = mpf_physptr;
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mf->mpf_length = 1;
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mf->mpf_specification = 4;
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mf->mpf_checksum = 0;
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mf->mpf_feature1 = 0;
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mf->mpf_feature2 = 0;
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mf->mpf_feature3 = 0;
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mf->mpf_feature4 = 0;
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mf->mpf_feature5 = 0;
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mf->mpf_checksum = smp_compute_checksum(mf, mf->mpf_length*16);
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return v;
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}
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void *smp_next_mpc_entry(struct mp_config_table *mc)
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{
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void *v;
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v = (void *)(((char *)mc) + mc->mpc_length);
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return v;
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}
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static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
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{
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mc->mpc_length += length;
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mc->mpc_entry_count++;
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}
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void *smp_next_mpe_entry(struct mp_config_table *mc)
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{
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void *v;
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v = (void *)(((char *)mc) + mc->mpc_length + mc->mpe_length);
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return v;
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}
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static void smp_add_mpe_entry(struct mp_config_table *mc, mpe_t mpe)
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{
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mc->mpe_length += mpe->mpe_length;
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}
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void smp_write_processor(struct mp_config_table *mc,
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unsigned char apicid, unsigned char apicver,
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unsigned char cpuflag, unsigned int cpufeature,
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unsigned int featureflag)
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{
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struct mpc_config_processor *mpc;
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mpc = smp_next_mpc_entry(mc);
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memset(mpc, '\0', sizeof(*mpc));
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mpc->mpc_type = MP_PROCESSOR;
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mpc->mpc_apicid = apicid;
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mpc->mpc_apicver = apicver;
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mpc->mpc_cpuflag = cpuflag;
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mpc->mpc_cpufeature = cpufeature;
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mpc->mpc_featureflag = featureflag;
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smp_add_mpc_entry(mc, sizeof(*mpc));
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}
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/* If we assume a symmetric processor configuration we can
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* get all of the information we need to write the processor
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* entry from the bootstrap processor.
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* Plus I don't think linux really even cares.
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* Having the proper apicid's in the table so the non-bootstrap
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* processors can be woken up should be enough.
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*/
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void smp_write_processors(struct mp_config_table *mc)
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{
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int boot_apic_id;
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unsigned apic_version;
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unsigned cpu_features;
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unsigned cpu_feature_flags;
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struct cpuid_result result;
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device_t cpu;
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boot_apic_id = lapicid();
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apic_version = lapic_read(LAPIC_LVR) & 0xff;
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result = cpuid(1);
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cpu_features = result.eax;
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cpu_feature_flags = result.edx;
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for(cpu = all_devices; cpu; cpu = cpu->next) {
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unsigned long cpu_flag;
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if ((cpu->path.type != DEVICE_PATH_APIC) ||
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(cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER))
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{
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continue;
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}
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if (!cpu->enabled) {
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continue;
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}
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cpu_flag = MPC_CPU_ENABLED;
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if (boot_apic_id == cpu->path.apic.apic_id) {
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cpu_flag = MPC_CPU_ENABLED | MPC_CPU_BOOTPROCESSOR;
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}
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smp_write_processor(mc,
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cpu->path.apic.apic_id, apic_version,
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cpu_flag, cpu_features, cpu_feature_flags
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);
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}
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}
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static void smp_write_bus(struct mp_config_table *mc,
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unsigned char id, const char *bustype)
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{
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struct mpc_config_bus *mpc;
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mpc = smp_next_mpc_entry(mc);
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memset(mpc, '\0', sizeof(*mpc));
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mpc->mpc_type = MP_BUS;
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mpc->mpc_busid = id;
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memcpy(mpc->mpc_bustype, bustype, sizeof(mpc->mpc_bustype));
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smp_add_mpc_entry(mc, sizeof(*mpc));
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}
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void smp_write_ioapic(struct mp_config_table *mc,
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unsigned char id, unsigned char ver,
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unsigned long apicaddr)
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{
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struct mpc_config_ioapic *mpc;
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mpc = smp_next_mpc_entry(mc);
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memset(mpc, '\0', sizeof(*mpc));
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mpc->mpc_type = MP_IOAPIC;
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mpc->mpc_apicid = id;
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mpc->mpc_apicver = ver;
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mpc->mpc_flags = MPC_APIC_USABLE;
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mpc->mpc_apicaddr = apicaddr;
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smp_add_mpc_entry(mc, sizeof(*mpc));
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}
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void smp_write_intsrc(struct mp_config_table *mc,
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unsigned char irqtype, unsigned short irqflag,
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unsigned char srcbus, unsigned char srcbusirq,
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unsigned char dstapic, unsigned char dstirq)
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{
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struct mpc_config_intsrc *mpc;
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mpc = smp_next_mpc_entry(mc);
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memset(mpc, '\0', sizeof(*mpc));
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mpc->mpc_type = MP_INTSRC;
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mpc->mpc_irqtype = irqtype;
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mpc->mpc_irqflag = irqflag;
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mpc->mpc_srcbus = srcbus;
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mpc->mpc_srcbusirq = srcbusirq;
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mpc->mpc_dstapic = dstapic;
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mpc->mpc_dstirq = dstirq;
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smp_add_mpc_entry(mc, sizeof(*mpc));
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#ifdef DEBUG_MPTABLE
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printk(BIOS_DEBUG, "add intsrc srcbus 0x%x srcbusirq 0x%x, dstapic 0x%x, dstirq 0x%x\n",
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srcbus, srcbusirq, dstapic, dstirq);
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hexdump(__func__, mpc, sizeof(*mpc));
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#endif
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}
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void smp_write_intsrc_pci_bridge(struct mp_config_table *mc,
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unsigned char irqtype, unsigned short irqflag,
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struct device *dev,
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unsigned char dstapic, unsigned char *dstirq)
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{
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struct device *child;
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int i;
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int srcbus;
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int slot;
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struct bus *link;
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unsigned char dstirq_x[4];
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for (link = dev->link_list; link; link = link->next) {
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child = link->children;
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srcbus = link->secondary;
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while (child) {
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if (child->path.type != DEVICE_PATH_PCI)
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goto next;
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slot = (child->path.pci.devfn >> 3);
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/* round pins */
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for (i = 0; i < 4; i++)
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dstirq_x[i] = dstirq[(i + slot) % 4];
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if ((child->class >> 16) != PCI_BASE_CLASS_BRIDGE) {
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/* pci device */
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printk(BIOS_DEBUG, "route irq: %s\n", dev_path(child));
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for (i = 0; i < 4; i++)
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smp_write_intsrc(mc, irqtype, irqflag, srcbus, (slot<<2)|i, dstapic, dstirq_x[i]);
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goto next;
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}
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switch (child->class>>8) {
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case PCI_CLASS_BRIDGE_PCI:
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case PCI_CLASS_BRIDGE_PCMCIA:
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case PCI_CLASS_BRIDGE_CARDBUS:
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printk(BIOS_DEBUG, "route irq bridge: %s\n", dev_path(child));
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smp_write_intsrc_pci_bridge(mc, irqtype, irqflag, child, dstapic, dstirq_x);
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}
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next:
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child = child->sibling;
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}
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}
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}
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void smp_write_lintsrc(struct mp_config_table *mc,
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unsigned char irqtype, unsigned short irqflag,
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unsigned char srcbusid, unsigned char srcbusirq,
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unsigned char destapic, unsigned char destapiclint)
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{
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struct mpc_config_lintsrc *mpc;
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mpc = smp_next_mpc_entry(mc);
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memset(mpc, '\0', sizeof(*mpc));
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mpc->mpc_type = MP_LINTSRC;
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mpc->mpc_irqtype = irqtype;
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mpc->mpc_irqflag = irqflag;
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mpc->mpc_srcbusid = srcbusid;
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mpc->mpc_srcbusirq = srcbusirq;
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mpc->mpc_destapic = destapic;
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mpc->mpc_destapiclint = destapiclint;
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smp_add_mpc_entry(mc, sizeof(*mpc));
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}
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void smp_write_address_space(struct mp_config_table *mc,
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unsigned char busid, unsigned char address_type,
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unsigned int address_base_low, unsigned int address_base_high,
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unsigned int address_length_low, unsigned int address_length_high)
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{
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struct mp_exten_system_address_space *mpe;
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mpe = smp_next_mpe_entry(mc);
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memset(mpe, '\0', sizeof(*mpe));
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mpe->mpe_type = MPE_SYSTEM_ADDRESS_SPACE;
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mpe->mpe_length = sizeof(*mpe);
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mpe->mpe_busid = busid;
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mpe->mpe_address_type = address_type;
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mpe->mpe_address_base_low = address_base_low;
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mpe->mpe_address_base_high = address_base_high;
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mpe->mpe_address_length_low = address_length_low;
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mpe->mpe_address_length_high = address_length_high;
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smp_add_mpe_entry(mc, (mpe_t)mpe);
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}
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void smp_write_bus_hierarchy(struct mp_config_table *mc,
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unsigned char busid, unsigned char bus_info,
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unsigned char parent_busid)
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{
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struct mp_exten_bus_hierarchy *mpe;
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mpe = smp_next_mpe_entry(mc);
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memset(mpe, '\0', sizeof(*mpe));
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mpe->mpe_type = MPE_BUS_HIERARCHY;
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mpe->mpe_length = sizeof(*mpe);
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mpe->mpe_busid = busid;
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mpe->mpe_bus_info = bus_info;
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mpe->mpe_parent_busid = parent_busid;
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smp_add_mpe_entry(mc, (mpe_t)mpe);
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}
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void smp_write_compatibility_address_space(struct mp_config_table *mc,
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unsigned char busid, unsigned char address_modifier,
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unsigned int range_list)
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{
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struct mp_exten_compatibility_address_space *mpe;
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mpe = smp_next_mpe_entry(mc);
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memset(mpe, '\0', sizeof(*mpe));
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mpe->mpe_type = MPE_COMPATIBILITY_ADDRESS_SPACE;
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mpe->mpe_length = sizeof(*mpe);
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mpe->mpe_busid = busid;
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mpe->mpe_address_modifier = address_modifier;
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mpe->mpe_range_list = range_list;
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smp_add_mpe_entry(mc, (mpe_t)mpe);
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}
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void mptable_add_isa_interrupts(struct mp_config_table *mc, unsigned long bus_isa, unsigned long apicid, int external_int2)
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{
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/*I/O Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
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smp_write_intsrc(mc, external_int2?mp_INT:mp_ExtINT,
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MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid, 0x0);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid, 0x1);
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smp_write_intsrc(mc, external_int2?mp_ExtINT:mp_INT,
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MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid, 0x2);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x3, apicid, 0x3);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x4, apicid, 0x4);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x6, apicid, 0x6);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x7, apicid, 0x7);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x8, apicid, 0x8);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x9, apicid, 0x9);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xa, apicid, 0xa);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xb, apicid, 0xb);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xc, apicid, 0xc);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, apicid, 0xd);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid, 0xe);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid, 0xf);
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}
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void mptable_write_buses(struct mp_config_table *mc, int *max_pci_bus, int *isa_bus) {
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int dummy, i, highest;
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char buses[256];
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struct device *dev;
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if (!max_pci_bus) max_pci_bus = &dummy;
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if (!isa_bus) isa_bus = &dummy;
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*max_pci_bus = 0;
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highest = 0;
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memset(buses, 0, sizeof(buses));
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for (dev = all_devices; dev; dev = dev->next) {
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struct bus *bus;
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for (bus = dev->link_list; bus; bus = bus->next) {
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if (bus->secondary > 255) {
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printk(BIOS_ERR, "A bus claims to have a bus ID > 255?!? Aborting");
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return;
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}
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buses[bus->secondary] = 1;
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if (highest < bus->secondary) highest = bus->secondary;
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}
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}
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for (i=0; i <= highest; i++) {
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if (buses[i]) {
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smp_write_bus(mc, i, "PCI ");
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*max_pci_bus = i;
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}
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}
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*isa_bus = *max_pci_bus + 1;
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smp_write_bus(mc, *isa_bus, "ISA ");
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}
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