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Felix Held c2cee06b4e soc/amd/common/block/i2c: implement proper read_resource 
Before this patch the reservation of the MMIO region of the I2C
controllers was done in the LPC controller PCI device despite the I2C
controllers already being devices in the devicetree. This patch
implements this functionality as read_resources function of the I2C
device instead. This will only reserve the memory when the I2C devices
are enabled in devicetree which is a change from the previous behavior.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I67c853df3be2f593ecfa113ae2f74e5df7cf74e0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58307
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-10-15 19:18:26 +00:00
3rdparty Update vboot submodule to upstream main (13f601f) 2021-09-29 15:35:28 +00:00
configs configs/config.google_meep_cros: don't select ADD_FSP_BINARIES 2021-09-04 18:33:29 +00:00
Documentation Doc/mainboard_io_trap_handler_sample.c: Drop file 2021-10-15 18:25:48 +00:00
LICENSES
payloads libpayload: Add mock architecture 2021-10-11 12:59:57 +00:00
spd spd: Add SPD for 4JQA-0622AD to spd/ 2021-09-23 06:24:11 +00:00
src soc/amd/common/block/i2c: implement proper read_resource 2021-10-15 19:18:26 +00:00
tests tests: Add lib/lzma-test test case 2021-10-14 13:13:07 +00:00
util mainboard: Drop invalid VGA_BIOS_FILE defaults 2021-10-15 09:08:35 +00:00
.checkpatch.conf lint: checkpatch: Only exclude specific src/vendorcode/ subdirectories 2021-04-06 16:04:41 +00:00
.clang-format
.editorconfig
.gitignore
.gitmodules .gitmodules: Update intel-microcode submodule to track branch=main 2021-06-09 17:20:50 +00:00
.gitreview
AUTHORS
COPYING
gnat.adc
MAINTAINERS MAINTAINERS: Add Reka for SPD utilities 2021-10-15 07:42:09 +00:00
Makefile util/kconfig: Uprev to Linux 5.13's kconfig 2021-07-13 20:28:14 +00:00
Makefile.inc Makefile: Add src/soc/* to subdirs 2021-10-11 12:57:58 +00:00
README.md
toolchain.inc toolchain.inc: copy architecture specific CFLAGS to GCC_ADAFLAGS 2021-07-01 09:43:54 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.