Kyösti Mälkki c32a92e5a0 intel/945 boards: Use smp_write_pci_intsrc() ... Radically reduces line lengths and splits '(bus<<2) | INT' to separate parameters. Change-Id: I0cfd714da3d2773affdb34d1dab2ac32879e2cfd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/30740 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2019-06-25 18:48:43 +00:00
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acpi
arch	riscv: workaround selfboot putting the coreboot table into prog_entry_arg	2019-06-23 12:15:23 +00:00
commonlib	commonlib/storage: use ALIGN_UP instead of ALIGN for better readability	2019-06-21 12:49:43 +00:00
console	add ctype.h header	2019-06-24 21:15:14 +00:00
cpu	src/cpu: Use 'include <stdlib.h>' when appropriate	2019-06-22 17:53:39 +00:00
device	device/pci_rom: use ALIGN_UP instead of ALIGN for better readability	2019-06-21 12:49:57 +00:00
drivers	Replace ENV_RAMSTAGE with ENV_PAYLOAD_LOADER	2019-06-24 04:33:06 +00:00
ec	src/ec: Use 'include <stdlib.h>' when appropriate	2019-06-22 17:54:31 +00:00
include	add ctype.h header	2019-06-24 21:15:14 +00:00
lib	add ctype.h header	2019-06-24 21:15:14 +00:00
mainboard	intel/945 boards: Use smp_write_pci_intsrc()	2019-06-25 18:48:43 +00:00
northbridge
security
soc	soc/intel/dnv: Fix value of B_PCH_GPIO_RX_SCI_ROUTE	2019-06-25 16:09:05 +00:00
southbridge	sb/intel/common: Link SPI code in bootblock	2019-06-21 09:18:57 +00:00
superio	nuvoton/early_serial: improve comments on serial pinmux settings	2019-06-22 11:39:12 +00:00
vendorcode	add ctype.h header	2019-06-24 21:15:14 +00:00
Kconfig