coreboot-kgpe-d16/src
Michael Niewöhner c47fc40022 soc/intel/pmc: add a note about legacy OSes/payloads to PM Timer Kconfig
Since ACPI 5.0A it is allowed to disable the ACPI Timer, when the
according FADT flag `ACPI_FADT_PLATFORM_CLOCK` is unset.

Starting with Skylake, most platforms (except Xeon-SP) support PM Timer
emulation, so even legacy OSes and payloads should work fine with the
hardware PM Timer disabled. However, when the `TMR_STS` functionality
is required, some legacy OSes might still not work (properly).

Add a note about this to the Kconfig help.

Change-Id: I53f1814113902124779ed85da030374439570688
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58018
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Lance Zhao
2021-10-16 09:11:23 +00:00
..
acpi src/acpi to src/lib: Fix spelling errors 2021-10-05 18:06:39 +00:00
arch arch/x86/smbios: Add generation of type 20 table 2021-10-15 00:18:40 +00:00
commonlib src/acpi to src/lib: Fix spelling errors 2021-10-05 18:06:39 +00:00
console src/acpi to src/lib: Fix spelling errors 2021-10-05 18:06:39 +00:00
cpu cpu/intel/haswell: Lock PKG_CST_CONFIG_CONTROL MSR 2021-10-15 13:43:05 +00:00
device src/acpi to src/lib: Fix spelling errors 2021-10-05 18:06:39 +00:00
drivers drivers/pc80/tpm: Fix wrong debug message 2021-10-13 13:57:05 +00:00
ec ec/google/chromeec: Register USB-C mux operations 2021-10-06 22:20:32 +00:00
include Revert "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main" 2021-10-15 13:00:32 +00:00
lib lib/thread: Remove thread stack alignment requirement 2021-10-05 22:40:25 +00:00
mainboard mb/google/brya/var/taeko: Add fw_config probe for GL9750 and RTS5232S 2021-10-16 01:04:28 +00:00
northbridge nb/intel/haswell: Add HDAU ACPI device 2021-10-13 17:47:01 +00:00
security Revert "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main" 2021-10-15 13:00:32 +00:00
soc soc/intel/pmc: add a note about legacy OSes/payloads to PM Timer Kconfig 2021-10-16 09:11:23 +00:00
southbridge sb/intel/lynxpoint: Enable PCIe Clock PM and ASPM L1 2021-10-14 11:17:52 +00:00
superio src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
vendorcode vc/amd/fsp/cezanne: Add UPD fsp_owns_pcie_resets to FSP-M for Cezanne 2021-10-11 15:55:35 +00:00
Kconfig lib/thread: Switch to using CPU_INFO_V2 2021-10-05 22:39:16 +00:00