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Ed Swierk c4e052cd50 The early init code of several Intel southbridge chipsets calls 
pci_locate_device() to locate the SMBus controller and LPC bridge
devices on the PCI bus. Since these devices are always located at a
fixed PCI bus:device:function, the code can be simplified by
hardcoding the devices.

Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Corey Osgood <corey.osgood@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3205 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 		2008-04-01 02:36:59 +00:00
..
arch Now coreboot performs IRQ routing for some boards. 2008-03-29 16:59:27 +00:00
boot rename linuxbios_* files, too. 2008-01-18 16:16:45 +00:00
config Now coreboot performs IRQ routing for some boards. 2008-03-29 16:59:27 +00:00
console Rename almost all occurences of LinuxBIOS to coreboot. 2008-01-18 15:08:58 +00:00
cpu * split model_centaur into model_c3 and model_c7 2008-03-18 23:10:24 +00:00
devices In pci_device.c, the class for VGA was not tested properly, leading to 2008-02-28 23:10:38 +00:00
drivers Rename almost all occurences of LinuxBIOS to coreboot. 2008-01-18 15:08:58 +00:00
include Following patch adds K8M890 support. It initializes the AGP and graphics UMA. 2008-03-20 21:19:50 +00:00
lib Clarify LZMA code license. 2008-03-17 01:37:27 +00:00
mainboard Like other Intel chipsets, the Intel 3100 has a TCO timer that reboots 2008-03-30 11:31:15 +00:00
northbridge This patch implements support for the Intel 3100 integrated 2008-03-16 23:36:00 +00:00
pc80 rename linuxbios_* files, too. 2008-01-18 16:16:45 +00:00
pmc/altimus/mpc7410 Please bear with me - another rename checkin. This qualifies as trivial, no 2008-01-18 10:35:56 +00:00
ram Trivial: remove unused variable. 2007-10-22 17:04:39 +00:00
sdram 1201_ht_bus0_dev0_fidvid_core.diff 2005-12-02 21:52:30 +00:00
southbridge The early init code of several Intel southbridge chipsets calls 2008-04-01 02:36:59 +00:00
stream Rename almost all occurences of LinuxBIOS to coreboot. 2008-01-18 15:08:58 +00:00
superio This patch implements support for the Intel 3100 integrated SuperIO and UART. 2008-03-16 23:31:04 +00:00