coreboot-kgpe-d16/src
Lee Leahy c52a4f7328 drivers/intel/fsp1_1: Add fsp_write_line function
Add fsp_write_line function which may be called by FSP to output debug
serial data to the console.

TEST=Build and run on Galileo Gen2

Change-Id: Ib01aef448798e47ac613b38eb20bf25537b9221f
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16128
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-08-10 22:30:34 +02:00
..
acpi src/acpi: Capitalize ACPI and SATA 2016-07-31 19:25:40 +02:00
arch acpi: Generate object for coreboot table region 2016-08-06 04:35:43 +02:00
commonlib commonlib/region: make buffer argument const for writeat 2016-08-08 18:34:17 +02:00
console console: Add write line routine 2016-08-10 22:30:19 +02:00
cpu Remove non-ascii & unprintable characters 2016-08-01 21:44:45 +02:00
device src/device: Capitalize CPU, RAM and ROM 2016-07-31 18:33:30 +02:00
drivers drivers/intel/fsp1_1: Add fsp_write_line function 2016-08-10 22:30:34 +02:00
ec google/chromeec: Enable/Disable ccache with config variable 2016-08-08 17:36:12 +02:00
include console: Add write line routine 2016-08-10 22:30:19 +02:00
lib lib/timestamp: Add timestamps to CBMEM in POSTCAR stage 2016-08-04 03:27:08 +02:00
mainboard google/reef: Add mainboard handler function for gpio SMI 2016-08-10 21:11:23 +02:00
northbridge x4x: make preallocated IGD memory a cmos option 2016-08-09 10:43:03 +02:00
soc Makefiles: Use $(MAINBOARD_DIR) instead of $(CONFIG_MAINBOARD_DIR) 2016-08-10 21:12:03 +02:00
southbridge chromeos chipsets: select RTC usage 2016-08-08 18:37:37 +02:00
superio superio/*: Relocate Kconfig to chip folder. 2016-08-09 10:38:30 +02:00
vboot src/vboot: Capitalize RAM and CPU 2016-07-31 19:31:41 +02:00
vendorcode vendorcode/amd: Remove dead code 2016-08-09 10:40:32 +02:00
Kconfig superio/*: Relocate Kconfig to chip folder. 2016-08-09 10:38:30 +02:00