coreboot-kgpe-d16/src/arch/riscv
Kyösti Mälkki 4ac35707d9 arch/riscv: Fix some SMP related headers
Change-Id: I58419450dbe34741b4f5b4920f435fdb91e9df22
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61143
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-01-19 19:29:42 +00:00
..
include arch/riscv: Fix some SMP related headers 2022-01-19 19:29:42 +00:00
arch_timer.c
boot.c
bootblock.S
fit_payload.c src/acpi to src/lib: Fix spelling errors 2021-10-05 18:06:39 +00:00
fp_asm.S
Kconfig
Makefile.inc arch/riscv: Avoid gcc11 replacing memset implementation with memset call 2021-09-19 18:52:22 +00:00
mcall.c
misaligned.c
misc.c
opensbi.c src/acpi to src/lib: Fix spelling errors 2021-10-05 18:06:39 +00:00
payload.c
pmp.c
ramstage.S
romstage.c
sbi.c
smp.c arch/riscv: Fix some SMP related headers 2022-01-19 19:29:42 +00:00
tables.c
trap_handler.c arch/riscv/trap_handler: add missing types.h include 2021-09-17 20:27:34 +00:00
trap_util.S
virtual_memory.c