coreboot-kgpe-d16/src/southbridge
Duncan Laurie c593999a0a lynxpoint: Enable extra 16 IOAPIC entries for GPIO PIRQ
LynxPoint-LP has an additional 16 entries in the IOAPIC that
can be assigned to specific GPIOs when they are configured
as PIRQ.

The maximum redirection entries field in the IOAPIC needs to
be set to 0x27 when this is enabled.

Additionally specific GPIOs need to be routed to PIRQ so they
interrupt via the IOAPIC instead of the GPIO IRQ 14/15.

Change-Id: Ie587e1d203422ff6fb7fc5056d20a5ae66720991
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56620
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4203
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-25 23:38:36 +01:00
..
amd AMD Hudson: Move function s3_resume_init_data to southbridge 2013-11-12 16:40:48 +01:00
broadcom x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
dmp dmp/vortex86ex: Move DMP specific POST code defines into one file 2013-11-24 05:36:36 +01:00
intel lynxpoint: Enable extra 16 IOAPIC entries for GPIO PIRQ 2013-11-25 23:38:36 +01:00
nvidia usbdebug: Fix boards without EARLY_CBMEM_INIT 2013-10-22 21:35:05 +02:00
rdc x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
ricoh GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
sis usbdebug: Fix boards without EARLY_CBMEM_INIT 2013-10-22 21:35:05 +02:00
ti GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
via southbridge/via/vt8237r/ctrl.c: Remove set but unused variable regm3 2013-11-05 21:33:38 +01:00
Kconfig Add support for DMP Vortex86EX PCI southbridge. 2013-07-03 18:31:22 +02:00
Makefile.inc Add support for DMP Vortex86EX PCI southbridge. 2013-07-03 18:31:22 +02:00