Tim Wawrzynczak c67e3c1a90 soc/intel/tigerlake: Add some helper macros for accessing TCSS DMA devices ... Change-Id: I6289d2049fbbb6bb532be3d9e2355c563ec98d1b Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47410 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>		2020-11-30 08:06:13 +00:00
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acpi	ACPI: Define acpi_get_preferred_pm_profile()	2020-11-19 22:58:41 +00:00
arch	arch/x86/smbios: Update SMBIOS type 16 error correction type	2020-11-25 09:18:04 +00:00
commonlib	cbfs: Add metadata cache	2020-11-21 10:43:53 +00:00
console	console: Override uart base address	2020-11-09 07:46:10 +00:00
cpu	Makefile.inc: Move adding mcu FIT entries	2020-11-27 09:18:20 +00:00
device	device: Drop unused HyperTransport code	2020-11-25 09:11:46 +00:00
drivers	drivers/intel/i210: Request Bus Master in .final ops	2020-11-30 07:58:13 +00:00
ec	ec/google/chromeec: Add more wrappers for regulator control	2020-11-18 06:13:12 +00:00
include	elog: Add new wake source codes	2020-11-30 08:05:55 +00:00
lib	cbfs: Add metadata cache	2020-11-21 10:43:53 +00:00
mainboard	mb/google/volteer/variant/copano: Add memory part support	2020-11-30 08:03:45 +00:00
northbridge	nb/amd: Deduplicate nb_common.h	2020-11-25 09:11:58 +00:00
security	cbfs: Add metadata cache	2020-11-21 10:43:53 +00:00
soc	soc/intel/tigerlake: Add some helper macros for accessing TCSS DMA devices	2020-11-30 08:06:13 +00:00
southbridge	sb/intel/lynxpoint: Replace hard-coded IDs with defines	2020-11-24 18:37:58 +00:00
superio	superio/smsc/sio1036: Support 16-bit IO port addressing	2020-11-18 13:12:11 +00:00
vendorcode	vc/intel/fsp/fsp2_0/alderlake: Update FSP header file version to 1483_11	2020-11-26 18:10:47 +00:00
Kconfig	soc/intel/xeon_sp: Move function debug macros	2020-10-29 16:44:19 +00:00