c726e03624
No in-tree board using that chipset has it not selected, so move selection from boards to southbridge. Change-Id: Id95660f088c8240606d45abf326cd5eefca30da3 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/658 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
73 lines
1.1 KiB
Text
73 lines
1.1 KiB
Text
if BOARD_BROADCOM_BLAST
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select ARCH_X86
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select CPU_AMD_SOCKET_940
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select NORTHBRIDGE_AMD_AMDK8
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select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
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select SOUTHBRIDGE_BROADCOM_BCM5780
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select SOUTHBRIDGE_BROADCOM_BCM5785
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select SUPERIO_NSC_PC87417
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select HAVE_BUS_CONFIG
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select HAVE_OPTION_TABLE
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select BOARD_ROMSIZE_KB_512
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select SB_HT_CHAIN_UNITID_OFFSET_ONLY
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select QRANK_DIMM_SUPPORT
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select DRIVERS_I2C_I2CMUX2
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config MAINBOARD_DIR
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string
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default broadcom/blast
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config DCACHE_RAM_BASE
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hex
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default 0xcf000
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config DCACHE_RAM_SIZE
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hex
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default 0x01000
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config DCACHE_RAM_GLOBAL_VAR_SIZE
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hex
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default 0x0
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config APIC_ID_OFFSET
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hex
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default 0x0
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config SB_HT_CHAIN_ON_BUS0
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int
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default 1
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config MAINBOARD_PART_NUMBER
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string
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default "Blast"
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config MAX_CPUS
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int
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default 4
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config MAX_PHYSICAL_CPUS
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int
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default 2
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x1
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config HT_CHAIN_UNITID_BASE
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hex
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default 0x6
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config SB_HT_CHAIN_ON_BUS0
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int
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default 2
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config IRQ_SLOT_COUNT
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int
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default 11
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endif # BOARD_BROADCOM_BLAST
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