96 lines
3.4 KiB
C
96 lines
3.4 KiB
C
/*
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* This file is part of the libpayload project.
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*
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* Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Datasheet:
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* - Name: MC146818: Real-time Clock Plus RAM (RTC)
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* - PDF: http://www.freescale.com/files/microcontrollers/doc/data_sheet/MC146818.pdf
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* - Order number: MC146818/D
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*/
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/*
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* See also:
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* http://bochs.sourceforge.net/techspec/CMOS-reference.txt
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* http://www.bioscentral.com/misc/cmosmap.htm
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*/
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#include <libpayload.h>
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/**
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* PCs can have either 64 (very old ones), 128, or 256 bytes of CMOS RAM.
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*
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* Usually you access the lower 128 CMOS bytes via I/O port 0x70/0x71.
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* For more recent chipsets with 256 bytes, you have to access the upper
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* 128 bytes (128-255) using two different registers, usually 0x72/0x73.
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*
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* On some chipsets this can be different, though. The VIA VT8237R for example
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* only recognizes the ports 0x74/0x75 for accessing the high 128 CMOS bytes
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* (as seems to be the case for multiple VIA chipsets).
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*
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* It's very chipset-specific if and how the upper 128 bytes are enabled at
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* all, but this work should be done in coreboot anyway. Libpayload assumes
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* that coreboot has properly enabled access to the upper 128 bytes and
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* doesn't try to do this on its own.
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*/
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#define RTC_PORT_STANDARD 0x70
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#ifdef CONFIG_RTC_PORT_EXTENDED_VIA
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#define RTC_PORT_EXTENDED 0x74
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#else
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#define RTC_PORT_EXTENDED 0x72
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#endif
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/**
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* Read a byte from the specified NVRAM address.
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*
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* @param addr The NVRAM address to read a byte from.
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* @return The byte at the given NVRAM address.
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*/
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u8 nvram_read(u8 addr)
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{
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u16 rtc_port = addr < 128 ? RTC_PORT_STANDARD : RTC_PORT_EXTENDED;
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outb(addr, rtc_port);
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return inb(rtc_port + 1);
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}
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/**
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* Write a byte to the specified NVRAM address.
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*
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* @param val The byte to write to NVRAM.
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* @param addr The NVRAM address to write to.
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*/
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void nvram_write(u8 val, u8 addr)
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{
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u16 rtc_port = addr < 128 ? RTC_PORT_STANDARD : RTC_PORT_EXTENDED;
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outb(addr, rtc_port);
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outb(val, rtc_port + 1);
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}
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