coreboot-kgpe-d16/targets/embeddedplanet/ep405pc/Config.lb

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# Config file for Embedded Planet EP405PC board
# This will make a target directory of ./ep405pc
target ep405pc
mainboard embeddedplanet/ep405pc
romimage "normal"
## Enable PPC405 instructions
option CPU_OPT="-mcpu=405"
## use a cross compiler
#option CROSS_COMPILE="powerpc-ibm-eabi-"
## Use stage 1 initialization code
option CONFIG_USE_INIT=1
## Use chip configuration
option CONFIG_CHIP_CONFIGURE=1
## We don't use compressed image
option CONFIG_COMPRESS=0
## Turn off POST codes
option NO_POST=1
## Enable serial console
option DEFAULT_CONSOLE_LOGLEVEL=8
option CONFIG_CONSOLE_SERIAL8250=1
# Divisor of 69 == 9600 baud due to weird clocking
option TTYS0_DIV=69
option TTYS0_BAUD=9600
## Boot linux from IDE
option CONFIG_IDE=1
option CONFIG_FS_STREAM=1
option CONFIG_FS_EXT2=1
option CONFIG_FS_ISO9660=1
option CONFIG_FS_FAT=1
option AUTOBOOT_CMDLINE="hda1:/vmlinuz"
option ROM_SIZE=1048576
## Board has fixed size RAM
option EMBEDDED_RAM_SIZE=64*1024*1024
## LinuxBIOS C code runs at this location in RAM
option _RAMBASE=0x00100000
##
## Use a 64K stack
##
option STACK_SIZE=0x10000
##
## Use a 64K heap
##
option HEAP_SIZE=0x10000
##
## System clock
##
option CONFIG_SYS_CLK_FREQ=33
##
option _ROMBASE=0xfff00000
## Reset vector address
option _RESET=0xfffffffc
## Exception vectors
option _EXCEPTION_VECTORS=_ROMBASE+0x100
## linuxBIOS ROM start address
option _ROMSTART=0xfff03000
## linuxBIOS C code runs at this location in RAM
option _RAMBASE=0x00100000
end
buildrom ./linuxbios.rom ROM_SIZE "normal"