coreboot-kgpe-d16/src/mainboard/google/rush/sdram_configs.c
Aaron Durbin 1ac4e591bf t132: Add shared romstage
There's no reason to duplicate code in the mainboards. Therefore,
drive the flow of romstage boot in the SoC. This allows for
easier scaling with multiple devices.

BUG=None
BRANCH=None
TEST=Built and booted to same place as before.

Original-Change-Id: I0d4df84034b19353daad0da1f722b820596c4f55
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/205992
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit de4310af6f6dbeedd7432683d1d1fe12ce48f46e)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Ie74f0eb1c983aff92d3cbafb7fe7d9d7cb65ae19
Reviewed-on: http://review.coreboot.org/8575
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-03-04 18:24:18 +01:00

56 lines
2.2 KiB
C

/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <soc/sdram_configs.h>
static struct sdram_params sdram_configs[] = {
#include "bct/sdram-hynix-2GB-924.inc" /* ram_code = 0000 */
#include "bct/sdram-hynix-4GB-792.inc" /* ram_code = 0001 */
#include "bct/sdram-unused.inc" /* ram_code = 0010 */
#include "bct/sdram-unused.inc" /* ram_code = 0011 */
#include "bct/sdram-unused.inc" /* ram_code = 0100 */
#include "bct/sdram-unused.inc" /* ram_code = 0101 */
#include "bct/sdram-unused.inc" /* ram_code = 0110 */
#include "bct/sdram-unused.inc" /* ram_code = 0111 */
#include "bct/sdram-unused.inc" /* ram_code = 1000 */
#include "bct/sdram-unused.inc" /* ram_code = 1001 */
#include "bct/sdram-unused.inc" /* ram_code = 1010 */
#include "bct/sdram-unused.inc" /* ram_code = 1011 */
#include "bct/sdram-unused.inc" /* ram_code = 1100 */
#include "bct/sdram-unused.inc" /* ram_code = 1101 */
#include "bct/sdram-unused.inc" /* ram_code = 1110 */
#include "bct/sdram-unused.inc" /* ram_code = 1111 */
};
const struct sdram_params *get_sdram_config()
{
uint32_t ramcode = sdram_get_ram_code();
/*
* If we need to apply some special hacks to RAMCODE mapping (ex, by
* board_id), do that now.
*/
printk(BIOS_SPEW, "%s: RAMCODE=%d\n", __func__, ramcode);
if (ramcode >= sizeof(sdram_configs) / sizeof(sdram_configs[0]) ||
sdram_configs[ramcode].MemoryType == NvBootMemoryType_Unused)
die("Invalid RAMCODE.");
return &sdram_configs[ramcode];
}